Samsung S3F80P5X User Manual page 13

Figure
Number
12-1
12-2
12-3
12-4
13-1
13-2
13-3
13-4
13-5
14-1
14-2
14-3
14-4
14-5
14-6
14-7
14-8
14-9
14-10
15-1
15-2
15-3
16-1
16-2
16-3
16-4
17-1
17-2
18-1
19-1
19-2
19-3
19-4
S3F80P5_UM_REV1.00 MICROCONTROLLER
List of Figures
Counter A Block Diagram........................................................................................... 12-2
Counter A Control Register (CACON) ....................................................................... 12-3
Counter A Registers ................................................................................................... 12-3
Counter A Output Flip-Flop Waveforms in Repeat Mode .......................................... 12-5
Simplified Timer 2 Function Diagram: Capture Mode ................................................ 13-2
Simplified Timer 2 Function Diagram: Interval Timer Mode....................................... 13-3
Timer 2 Block Diagram............................................................................................... 13-4
Timer 2 Control Register (T2CON) ............................................................................ 13-5
Timer 2 Registers (T2CNTH, T2CNTL, T2DATAH, T2DATAL) ................................. 13-6
Program Memory Address Space .............................................................................. 14-2
Smart Option .............................................................................................................. 14-3
Flash Memory Control Register (FMCON)................................................................. 14-5
Flash Memory User Programming Enable Register (FMUSR) .................................. 14-5
Flash Memory Sector Address Register (FMSECH) ................................................. 14-6
Flash Memory Sector Address Register (FMSECL) .................................................. 14-6
Sector Configurations in User Program Mode ........................................................... 14-7
Sector Erase Flowchart in User Program Mode ........................................................ 14-8
Byte Program Flowchart in a User Program Mode .................................................... 14-12
Program Flowchart in a User Program Mode ............................................................ 14-13
Low Voltage Detect (LVD) Block Diagram ................................................................. 15-3
Low Voltage Detect Control Register (LVDCON) ...................................................... 15-4
Low Voltage Detect Flag Selection Register (LVDSEL) ............................................ 15-4
Stop Mode Release Timing When Initiated by an External Interrupt ......................... 16-6
Stop Mode Release Timing When Initiated by a LVD................................................ 16-7
Input Timing for External Interrupts (Port 0 and Port 2) ............................................. 16-8
Operating Voltage Range of S3F80P5....................................................................... 16-11
24-Pin SOP Package Mechanical Data ..................................................................... 17-1
24-Pin SDIP Package Mechanical Data .................................................................... 17-2
Pin Assignment Diagram (24-Pin SOP/SDIP Package) ............................................ 18-2
Development System Configuration........................................................................... 19-2
TB80PB Target Board Configuration ......................................................................... 19-3
50-Pin Connector Pin Assignment for User System .................................................. 19-6
TB80PB Probe Adapter Cable ................................................................................... 19-6
(Conclude)
Title Page
Number
xiii