Clock Generator - EUROCOM M560A Service Manual

CLOCK GENERATOR

L8
1 2
+3VS
HCB1608K-121T25
+3VS
L58
HCB3216K-800T30
C412
+ C417 C415 C410 C411 C409 C413 C49
0.1UF_X7R
47UF/6.3V 0.1UF_X7R 0.1UF_X7R
4.7UF/10V 0.1UF_X7R 0.1UF_X7R 1000PF
L7
1 2 VDDCPU
+3VS
HCB1608K-121T25
C40 C42
10UF/6.3V 0.1UF_X7R
+3VS R273 10K/0402
R272 R274
0/0402 *0/0402
26 CLKEN#
8,9,11,18,19,21
Q13
8,9,11,18,19,21
R275 *0/0402 G 2N7002
6,11,12,26 DPG_VGATE
*0/0402
R276
10,11,12,26,27 PWROKICH
FSBSEL A
400 1
533 1
L56
VDD48 2
C39 C47 C41 HCB1608K-121T25
10UF/6.3V 0.1UF_X7R 0.1UF_X7R
C408 C406
0.1UF_X7R 10UF/6.3V
U4
11 44 CPUCLK0
VDD48 CPUCLK_0
C416 C50 C414 43 CPUCLK#0
CPUCLK#0
1000PF 1000PF 37
VDDA
41 CPUCLK1
CPUCLK_1
48 40 CPUCLK#1
VDDREF CPUCLK#1
1000PF
1 36 CPUCLK2
VDDPCI C_ITPCLK_2/SRC6
7 35 CPUCLK#2
VDDPCI C_ITPCLK#2/SRC#6
42 17 SRCCLK0
VDDCPU SRCCLK_0(LCDCLK)
21 18 SRCCLK#0
VDDSRC SRCCLK#0(LCDCLK#)
28
VDDSRC
34 19 SRCCLK1
VDDSRC SRCCLK_1
20 SRCCLK#1
SRCCLK#1
10P 50
X1
C44 22 SRCCLK2
SRCCLK_2
Y1 23 SRCCLK#2
SRCCLK#2
24 SRCCLK3
SRCCLK_3
14.318MHZ 25 SRCCLK#3
SRCCLK#3
C43 49
X2
10P 26 SATACLK
SATACLK
27 SATACLK#
SATACLK#
VTT_PWRGD# 10
VTT_PWRGD#/PD
31 SRCCLK4
SRCCLK_4
30 SRCCLK#4
SRCCLK#4
FS_B 16
FS_B/TST_MDE
33 SRCCLK5
SRCCLK_5(SATACLK)
32 SRCCLK#5
SRCCLK#5(SATACLK#)
11 PM_STPCPU# PM_STPCPU# 54
CPU_STOP#
PM_STPPCI# 55 14 DREF_CLK
11 PM_STPPCI#
PCI/SRC_STOP# DOT_96MHZ
15 DREF_CLK#
DOT#96MHZ
SMBCLK 46
SMBCLK
SCLK
SMBDATA 47
SMBDATA
SDATA
8
PCICLK_F0(ITP_E)
39 9
IREF PCICLK_F1(PCIE_E)
56 REQ_SEL
Iref=2.32mA
PCICLK2/REQ_SEL
2 3
GND PCICLK3
6
R280 GND
13 4
GND PCICLK4
29 5
GND PCICLK5
475_1%/0402 38
GNDA
45 12 FS_A
GND USB_48MHZ/FS_A
51 52
GND REF0
53 FS_C
B C
REF1/FS_C/TST_SEL
0 1
ICS954226
0 0
+3VS
R271 R269
10K 10K
FS_A
FS_B R270 C
2N3904
1K Q14
FS_C R279
2.2K
1
+3VS
CPUCLK
CPUCLK#
MCHCLK
MCHCLK#
ITPCLK
ITPCLK#
4P2RX33 SRCCLK_VGA
RN3
1 4 MCHCLK SRCCLK_VGA#
MCHCLK 5
2 3 MCHCLK# MCHCLK# 5 SRCCLK_MCH
4P2RX33 SRCCLK_MCH#
RN2
1 4 CPUCLK SRCCLK_ICH
CPUCLK 3
2 3 CPUCLK# CPUCLK# 3 SRCCLK_ICH#
*4P2RX33 SRCCLK_SATA
RN1
ITPCLK
1 4 SRCCLK_SATA#
ITPCLK 3
2 3 ITPCLK# SRCCLK_LAN
ITPCLK# 3
*4P2RX33 SRCCLK_LAN#
RN39
2 3 DREFSSCLK DREFSSCLK 6
1 4 DREFSSCLK#
DREFSSCLK# 6
4P2RX33
RN7
SRCCLK_MCH
2 3 SRCCLK_MCH 6
1 4 SRCCLK_MCH#
SRCCLK_MCH# 6
4P2RX33
RN6
2 3 SRCCLK_ICH
SRCCLK_ICH 11
1 4 SRCCLK_ICH#
SRCCLK_ICH# 11
RN5 4P2RX33
2 3 SRCCLK_LAN
SRCCLK_LAN 19
1 4 SRCCLK_LAN#
SRCCLK_LAN# 19
4P2RX33
RN4
2 3 SRCCLK_SATA
SRCCLK_SATA 12
1 4 SRCCLK_SATA# SRCCLK_SATA# 12
4P2RX33
RN8
1 4 SRCCLK_VGA
SRCCLK_VGA 10
2 3 SRCCLK_VGA# SRCCLK_VGA# 10
+3VS
RN40 *4P2RX33
2 3 DREFCLK DREFCLK 6
1 4 DREFCLK#
DREFCLK# 6
R53 *10K/0402
+3VS
R55 10K/0402
R54 33/0402 PCLKICH
PCLKICH 11
R268 33/0402 PCLKH8
PCLKH8 25
R51 33/0402 PCLKFWH
PCLKFWH 24
R59 33/0402 PCLKMINI1
PCLKMINI1 17
R58 12.1_1%/0402 PCLKPCM PCLKPCM 15
R57 12.1_1%/0402 PCLKSIO
PCLKSIO 24
R56 12.1_1%/0402 PCLKMINI2
PCLKMINI2 17
PCLKLAN
R515 12.1_1%/0402 PCLKLAN 18
R52 33/0402 USBCLK48
USBCLK48 11
R48 33/0402 ICHCLK14
ICHCLK14 11
R49 33/0402 SIOCLK14
SIOCLK14 24
REQ_SEL
+1.05VS PCLKICH
PCLKH8
PCLKFWH
PCLKMINI1
R277 R278
PCLKPCM
4.7K 1K
PCLKSIO
PCLKMINI2
USBCLK48
E
CPU_BSEL1 3,6
ICHCLK14
SIOCLK14
CPU_BSEL0 3,6
Schematic Diagrams
R284 49.9_1%/0402
R283 49.9_1%/0402
R46 49.9_1%/0402
R45 49.9_1%/0402
Sheet 2 of 40
R282 49.9_1%/0402
R281 49.9_1%/0402
R69 49.9_1%/0402
R68 49.9_1%/0402
CLOCK
R67 49.9_1%/0402
R66 49.9_1%/0402
R65 49.9_1%/0402
R64 49.9_1%/0402
GENERATOR
R61 49.9_1%/0402
R60 49.9_1%/0402
R63 49.9_1%/0402
R62 49.9_1%/0402
P.U --> Pin17/18 For SRCCLK
O.P --> Pin17/18 For DOTCLK
P.U --> Pin35/36 For ITPCLK
P.D --> Pin35/36 For SRCCLK
+3VS
R50 10K/0402
C51
*10PF
C407
*10PF
C48
*10PF
C55
*10PF
C54
*10PF
C53
*10PF
C52
*10PF
C670
*10PF
C45
*10PF
C46
*10PF
CLOCK GENERATOR B - 3