Control Of Clock Timer - Epson E0C6001 Technical Manual

Control of clock
timer
Table 4.7.1 Control bits of clock timer
Address
D3
TM3
0E4H
0
R
0EBH
0
0EFH
0 TMRST
R
0F9H
TM0–TM3 Timer data (0E4H)
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Clock Timer)
Table 4.7.1 shows the clock timer control bits and their
addresses.
Register
D2 D1 D0 Name
TM2 TM1 TM0 TM3
R TM2
TM1
TM0
EIT2 EIT8 EIT32
0
R/W
EIT2
EIT8
EIT32
IT2 IT8 IT32 0
R
IT2
IT8
IT32
0 0 0
TMRST
W R
0
0
The l6 Hz to 2 Hz timer data of the clock timer can be read
from this register. These four bits are read-only, and write
operations are invalid.
After an initial reset, the timer data is initialized to 0H.
SR 1 0
High Low
–
Timer data (clock timer 2 Hz)
High Low
–
Timer data (clock timer 4 Hz)
High Low
–
Timer data (clock timer 8 Hz)
High Low
–
Timer data (clock timer 16 Hz)
0 Enable Mask
Interrupt mask register (clock timer 2 Hz)
0 Enable Mask
Interrupt mask register (clock timer 8 Hz)
0 Enable Mask
Interrupt mask register (clock timer 32 Hz)
0 Yes No
Interrupt factor flag (clock timer 2 Hz)
0 Yes No
Interrupt factor flag (clock timer 8 Hz)
Yes No
0
Interrupt factor flag (clock timer 32 Hz)
Reset Reset – Clock timer reset
Comment
I-47