Ide Interfaces; Figure 7. Usb Port Configuration - Intel S875WP1LX Specification

S875WP1-E TPS
82801ER
I/O Controller Hub
(ICH5-R)
NOTES
•
Computer systems that have an unshielded cable attached to a USB port may not meet
FCC Class B requirements, even if no device is attached to the cable. Use shielded
cable that meets the requirements for full-speed devices.
•
Native USB 2.0 support has been tested with Windows* 2000 and Windows XP drivers
and is not currently supported by any other operating system. See the Intel server board
support website at
possible driver updates for other operating systems.
For information about
The location of the USB connectors on the back panel
The location of the front panel USB connector
The signal names of the front panel USB header
Legacy USB support
Wake from USB
3.2.3

IDE Interfaces

The ICH5-R IDE controller has two independent bus-mastering IDE interfaces that can be
independently enabled. The IDE interfaces support the following modes:
•
Programmed I/O (PIO): processor controls data transfer.
•
8237-style DMA: DMA offloads the processor, supporting transfer rates of up to 16 MB/sec.
•
Ultra DMA: DMA protocol on IDE bus supporting host and target throttling and transfer rates
of up to 33 MB/sec.
•
ATA-66: DMA protocol on IDE bus supporting host and target throttling and transfer
rates of up to 66 MB/sec. The ATA-66 protocol is similar to Ultra DMA and is device
driver compatible.
•
ATA-100: DMA protocol on IDE bus allows host and target throttling. The ICH5-R ATA-
100 logic can achieve read transfer rates up to 100 MB/sec and write transfer rates up to
88 MB/sec.
Revision 4.0
USB USB ports [2]
USB USB ports [2]
USB USB ports [2]

Figure 7. USB Port Configuration

http://support.intel.com/support/motherboards/server/s875wp1-e
Functional Architecture
Back panel USB connectors
above NIC1
Back panel USB connectors
above NIC2
Front panel USB header
Providing up to 2 USB ports
OM16101
Refer to
Figure 1
Figure 1
Section 5.9
Section 6.4
Section 3.6
for
15