Table 16. Dma Channels - Intel S875WP1LX Specification

Maps and Interrupts
Address (hex)
03F6 1 byte
03F8 - 03FF 8 bytes
04D0 - 04D1 2 bytes
LPTn + 400 8 bytes
0CF8 - 0CFB (Note 2) 4 bytes
(Note 3) 1 byte
0CF9
0CFC - 0CFF 4 bytes
FFA0 - FFA7 8 bytes
FFA8 - FFAF 8 bytes
Notes:
1. Default, but can be changed to another address range
2. Dword access only
3. Byte access only
4.3 DMA Channels
DMA Channel
Number
0
1
2
3
4
5
6
7
36
Size
Primary IDE channel command port
COM1
Edge/level triggered PIC
ECP port, LPTn base address + 400h
PCI configuration address register
Reset control register
PCI configuration data register
Primary bus master IDE registers
Secondary bus master IDE registers

Table 16. DMA Channels

Data Width
8 or 16 bits Open
8 or 16 bits Parallel port
8 or 16 bits Diskette drive
8 or 16 bits Parallel port (for ECP or EPP)
8 or 16 bits DMA controller
16 bits Open
16 bits Open
16 bits Open
S875WP1-E TPS
Description
System Resource
Revision 4.0