Die Voltage Validation; Agtl+ Fsb Specifications - Intel E5410 - Cpu Xeon Quad Core 2.33Ghz Fsb1333Mhz 12M Lga771 Tray Datasheet

Quad-Core Intel® Xeon® Processor 5400 Series Electrical Specifications
Figure 2-11. V Overshoot Example Waveform
CC
VID + 0.050
VID - 0.000
Notes:
1. VOS is the measured overshoot voltage.
2. TOS is the measured time duration above VID.
2.13.3

Die Voltage Validation

Core voltage (VCC) overshoot events at the processor must meet the specifications in
Table 2-18
and across the VCC_DIE_SENSE2 and VSS_DIE_SENSE2 lands. Overshoot events that
are < 10 ns in duration may be ignored. These measurements of processor die level
overshoot should be taken with a 100 MHz bandwidth limited oscilloscope.
2.14

AGTL+ FSB Specifications

Routing topologies are dependent on the processors supported and the chipset used in
the design. Please refer to the appropriate platform design guidelines for specific
implementation details. In most cases, termination resistors are not required as these
are integrated into the processor silicon. See
not include on-die termination. Please refer to
Valid high and low levels are determined by the input buffers via comparing with a
reference voltage called GTLREF_DATA_MID, GTLREF_DATA_END, GTLREF_ADD_MID,
and GTLREF_ADD_END. GTLREF_DATA_MID and GTLREF_DATA_END is the reference
voltage for the FSB 4X data signals, GTLREF_ADD_MID, and GTLREF_ADD_END is the
reference voltage for the FSB 2X address signals and common clock signals.
lists the GTLREF_DATA_MID, GTLREF_DATA_END, GTLREF_ADD_MID, and
GTLREF_ADD_END specifications.
Example Overshoot Waveform
0 5
T
OS
V
OS
when measured across the VCC_DIE_SENSE and VSS_DIE_SENSE lands
T
OS
10 15
Time [us]
: Overshoot time above VID
: Overshoot above VID
Table 2-8 for details on which signals do
Table 2-19 for R
V
OS
20 25
values.
TT
Table 2-19
39