Data General NOVA 4/S Manual page 17

The real-time clock interface can supply program
inspect and modify the system's state and aid program
debugging.
e Stop, start and continue program execution
to Part II, Chapter 11.
only
only
Each board contains integral refresh logic and each is
boards contain 16,384 by 1 bit memory elements.
Memory read/write cycle time is 400ns. However, due
to the modular organization of the memory elements
dedicated to a particular module, memory operations
can be initiated every 100ns, providing the same
memory module is not addressed within the 400ns cycle
time.
and 4/X computers only. It executes the NOVA 3
microdiagnostics stored in internal ROM.
governed by information provided by the CPU and
carried to the FPU by dedicated control lines and the
NOVA I/O bus. All data transfers take place between
the CPU, the floating point unit and the dynamic RAM
MEMOUT.
For more information concerning the operation of the