Direct Addressing; Indirect Addressing - Honeywell DDP-416 Instruction Manual

General purpose i/c digital computer
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The standard memory reference instruction word format allows 10 bits for
addressing.
Nine of these ten bits are used to specify any location within a given sector.
The remaining bit (called the sector bit) specifies this particular sector as sector zero or
the sector currently being accessed by the P-register.
For a 16, 384 word memory, 14-bits of addressing are necessary.
The least signi-
ficant 9 bits of this address are provided by the instruction word.
The most significant five
bits are either extracted from the P-register (if the sector bit is a ONE), or are zeros (if
the sector bit is zero).
This mechanism allows any memory reference instructions to
directly address any of 1024 words.
There is one other mechanism for addressing a sector other than sector zero or
the P-register sector, indirect addressing.
Indirect addressing uses the address specified
by the instruction word to fetch a new 14-bit address.
Indirect addressing is specified by
bit 1 of the instruction word.
Direct Addressing
Sector Bit Zero (See Figure 2-7). --
When sector bit M07 is ZERO, a 9-bit address
specified in bits 8 through 16 of the M-register (instruction word) specifies any location in
sector 0.
(Y)
8
_
16
are loaded from (M)
8
_
16
and (Y)
1
_
7
are cleared.
Sector Bit One. -- With the sector bit a one, a 14-bit address specified in bits 8 through 16
of the M-register (instruction word) and bits 3 through 7 of the P-register specifies any
location in the sector in which the instruction being executed is iocated.
(Y)
1
_7 are loaded
from (P)
1
_
7
and (Y)
8
_
16
are loaded from {M)
8
_
16
.
Indirect Add res sing
The Y-register is loaded as described in Direct Addressing and the contents of the
memory location specified by the Y-register are loaded into the M-register.
This address
can specify any location in memory.
The contents of the M-register is loaded into the
Y-register.
When further indirect addressing is called for (MOl is a ONE), the steps
described in this paragraph are repeated.
2-5

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