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DELAY MULTIVIBRATOR PAC, MODEL DM-335
The Delay Multi vibrator PAC, Model DM-335 {Figures A-81 and A-82), con-
tains two independent delay multivibrator circuits {one shots).
In response to an input
signal, the circuit will produce both a positive and a negative output pulse.
If no exter-
nal connections are made, the pulse width will be l 00 nsec.
Pulse widths between 50
nsec and 100 µsec may be attained by wiring jumpers at the PAC connector.
External
capacitors may be used to obtain any pulse width up to several seconds.
A significant
feature of the PAC is that the output transistion times are independent of the input sig-
nal and the output
puls~
width.
CIRCUIT FUNCTION
The delay multivibrator circuit is activated by a positive {ZERO to ONE) transi-
tion on an input (Figure A-83).
The output of the NAND gate will drop sharply from +6v
to Ov, and couple through CR! and C6 to the base of Ql.
The base of Ql going negative
will turn off that transistor, which will then turn on another NAND gate to lock up the
junction point of CR l and C6 at ground.
The input signal can then drop from a positive
voltage to ground without affecting the pulse delay operation.
After the base of Ql is driven negative, it tries to go positive toward +6v through
R3.
The basic timing is derived from the resistor-capacitor combination of R3 and C6.
When the base of Ql becomes about +O. 7v, Ql turns on and the output pulse ends. Resistor
R2 aids the recovery time by pulling C6 toward
+6v.
The pulse width may be changed by connecting different capacitors in parallel with
C6.
Additional pulse width variation may be obtained by connecting Rl in parallel with
.R.3.
The negation and assertion outputs are taken from two NAND gate microcircuits in series.
INPUT AND OUTPUT SIGNALS
Input. - - Each delay circuit has two standard microcircuit NAND gate inputs. A
positive-going signal at either input triggers an output pulse.
If either input is held at
ground, triggering by the other input is inhibited.
Enable. --If the enable input is held at logic ONE or is not connected, the circuit
can produce output pulses. If logic ZERO (ground) is applied, no output pulses will occur,
and if applied during an output pulse, the pulse will end.
Assertion Output. -- For the duration of the delay, a positive pulse appears at the
assertion output.
Negation Output. -- For the duration of the delay, a negative pulse appears at the
ne ga ti on output.
A-141
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