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A.
A B - f \ _ _ C
~
C=AB
A. LOGIC FUNCTION
B. TRUTH
TABLE
INPUT I
0
0
I
0: GROUND
I : +6V
1 NPUT 2
OUTPUT
0
I
I
I
0
I
0
550
Figure A-4.
Basic NAND Gate Logic
F-01, DUAL NANO GATE
,-
- - -
- - -
-
-- --
l
LOAD
I
INPUT[}
I
I
INPUT
8
5
OUTPUT
I
I
INPUT
9
IO
I
L
NODE
_J
-
-
-
-
-
-
NOTE:
ON ALL
MICROCIRCUITS,
PIN II IS CONNECTED
TO GROUND AND PIN 4
IS CONNECTED TO +6V.
B. F- 02, QUAD NANO GATE
,----
1
I
I
I N P U T D
1
OUTPUT
INPUT
3
- - -
- -
-- -- --
--...,
D D {)
2
8
14
10
13
I
I
I
I
I
L
_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ J
HI
Figure A-5.
Types F-01 and F-02 NAND Gate Equivalent Logic Symbols
LOAD
A
1
>-----
E
E= AB+ CD
B
LOAD
c
D
552
Figure A-6.
Paralleled NAND Gates with Common Load Resistors
A-11
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