Flag Pins - Analog Devices Lite ADSP-21375 EZ-KIT System Manual

System Architecture
ADSP-21375
DPI4 (SPI_AD1835CS)

FLAG Pins

2-6
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DPI12 (UART CTS)
DPI11 (UART RTS)
DPI10 (UART RX)
DPI9 (UART TX)
LED5
DPI14 (LED5)
LED4
DPI13 (LED4)
LED3
DPI8 (LED3)
DPI7 (LED2) LED2
DPI6 (LED1) LED1
DPI5 (SPI_FLASHCS)
DPI3 (SPICLK)
DPI2 (MISO)
DPI1 (MOSI)
Figure 2-3. DPI Connections Block Diagram
The processor has four general-purpose I/O flag pins.
the flag pin connections.
Table 2-1. I/O FLAG Pins
Processor FLAG Pin
FLAG0
FLAG1
FLAG2
FLAG3
For information on how to disable a push button from driving its associ-
ated flag pin, see "Push Button Enable Switch (SW7)" on page
The signals are available externally via the expansion interface con-
FLAG
nectors ( ). The pinout of these connectors can be found in
J1—3
"ADSP-21375 EZ-KIT Lite Schematic" on page
ADSP-21375 EZ-KIT Lite Evaluation System Manual
T2IN T2OUT
R2OUT R2IN
ADM3202
R1OUT R1IN
T1IN T1OUT
CS/
SPI
SCK
FLASH
SO
SI
CLATCH
CCLK
AD1835
COUT
CIN
EZ-KIT Lite Function
Push button ( ) input
SW2
Push button ( ) input
SW2
SDRAM chip select
LED8
B-1.
DB-9
Conn
Table 2-1 describes
2-13.