Analog Devices Lite ADSP-21375 EZ-KIT System Manual page 89

Index
contents, of this EZ-KIT Lite package,
core
clock rates,
frequency,
to CLKIN ratios,
voltage,
current limits,
D
DAC1-0 signals,
DAI
block diagram,
connections, 1-15, 1-16,
data transfer from codec,
disabling (SW3), 2-5,
header (P4), 2-4,
DAI16-15 pins,
DAI20-19 pins, 2-13,
DAI4 pins,
DAIP20-11 pins,
DATA31-0 pins,
data acquisition (DAQ) devices,
DB9 connectors,
default configuration, of this EZ-KIT Lite,
digital peripheral interface, See DPI
digital-to-analog converters (DACs), See
DIP switch (SW7), 1-3, 1-15, 2-13,
DPI
block diagram,
connections, 1-13, 1-16,
disabling (SW2),
header (P3), 2-5,
DPI12-10 pins, 2-7,
DPI14-13 pins, 1-16,
DPI2-1 (MOSI-0) pins, 1-13,
DPI3 (SPI clock) pins, 1-13,
I-2
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2-10
2-3
2-10
2-2
2-7
2-14
2-4
2-16
1-14
2-11
2-25
1-16
2-17
2-20
2-7
2-7
1-14
xi
1-3
AD1835A
2-5
2-16
2-5
2-24
2-12
2-7
2-7
2-7
ADSP-21375 EZ-KIT Lite Evaluation System Manual
1-2 DPI4 pins, 1-15,
DPI5 (chip select) pins, 1-13,
DPI8-6 pins, 1-16,
E
electret microphone, 1-15,
ELVIS (Educational Laboratory Virtual
Instrumentation Suite)
interface,
programmable flag jumper (JP4),
select jumper (JP2),
trigger pins,
voltage select jumper (JP3),
EPROM/flash boot mode,
evaluation license
CCES, 1-10
example programs,
expansion interface, 2-3, 2-5, 2-6, 2-7,
external
memory,
phase lock loop, See PLL
ports, 2-3,
F
features, of this EZ-KIT Lite,
FLAG0 pins, 1-16, 2-6, 2-7, 2-13,
FLAG1 pins, 1-16, 2-6, 2-7, 2-13,
FLAG2 pins, 2-6,
2-17
FLAG3 pins, 1-17, 2-6, 2-7,
FLAG registers,
flash memory
boot mode (default),
disconnect switch (SW15),
start/end addresses,
via external port, 1-12,
frame sync/clock signals, 1-15,
FUNCT_OUT signals,
2-7
2-7
2-7
2-12
1-13
2-20
2-19
2-20
2-20
2-3
1-17
2-22
1-12
2-10
x
2-17
2-17
2-7
2-16
1-16
2-10
2-15
1-12
2-3
2-11
2-14