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Commissioning
Accordingly, a maximum conversion time, i.e. a smallest sampling rate supported by the AI device, can be
specified.
Corresponds to IEC 61131-2 Chap. 7.10.2 2, "Sampling repeat time"
2. Typical signal delay
Corresponds to IEC 61131-2, Chapter 7.10.2 1, "Sampling duration". From this perspective it includes all
internal hardware and firmware components, but not "external" delay components from the fieldbus or the
controller (TwinCAT).
This delay is particularly relevant for absolute time considerations, if AI channels also provide a timestamp
that corresponds to the amplitude value – which can be assumed to match the physically prevailing
amplitude value at the time.
Due to the frequency-dependent runtime of a signal, a dedicated value can only be specified for a given
signal. The value also depends on possibly changing filter settings of the channel.
A typical characterization in the device documentation can be:
2.1 Signal delay (step response)
Keyword settling time:
The square wave signal can be generated externally with a frequency generator (note impedance!).
The 90% limit is used as detection threshold.
The signal delay [ms, µs] is then the time interval between the (ideal) electrical square wave signal and the
time when the analog process value has reached the 90% amplitude.
Fig. 146: Diagram Signal delay (step response)
2.2 Signal delay (linear)
Keyword group delay:
Describes the delay of a frequency-constant signal
Test signal can be generated externally with a frequency generator, e.g. as sawtooth or sine. Reference
would then be a simultaneous square wave signal.
The signal delay [ms, µs] is then the time interval between the applied electrical signal of a certain amplitude
and the moment when the analog process value reaches the same value.
For this purpose, the test frequency must be selected in a reasonable range; this can be, for example, 1/20
of the maximum sampling rate.
134
Version: 3.1
EL3692
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