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Chapter 9: Using the External State Analyzer
Configuring the External Analyzer
If no slave clock has appeared since the last master clock, the data on the lower 8
bits of the pod will be the same as the upper 8 bits. If more than one slave clock
has appeared since the last master clock, only the first slave data will be available to
the analyzer.
6 If the "mixed" or "true demultiplexing" slave clock modes are selected, answer the
"Edges of J (K,L,M) clock used for slave clock?" questions.
These four questions are asked when you select either the "mixed" or "demux"
slave clock mode. They allow you to define the slave clock. You can specify
rising, falling, both, or neither (none) edges of the J, K, L, and M clocks. When
several clock edges are specified, any one of the edges clocks the trace.
Clocks J and K are the external clock inputs of the external analyzer probe. The L
and M clocks are generated by the emulator. Typically, the L clock is the
emulation clock derived by the emulator and the M clock is not used.
To define labels for the external analyzer signals
1 Enter the modify configuration command.
2 Answer "yes" to the "Modify external analyzer configuration?" question.
3 Answer "yes" to the "Should emulation control the external bits?" question.
4 For each defined external label (there can be up to 8), answer the "name?", "start
bit?", "width?", and "polarity?" questions.
You can define up to eight labels for the 16 external data channels in the
configuration. These external analyzer labels can be used in trace commands, and
the data associated with these labels can be displayed in the trace list. One external
analyzer label, "xbits", is defined by the default configuration and is included in the
default trace list.
External labels can be defined with bits in the range of 0 through 15. The start bit
may be in the range 0 through 15, but the width of the label must not cause the label
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