4-6.4 Advanced Chipset Features; 4-6.4.1 Dram Configuration - SOLTEK B9A-FGR Manual

4-6.4 Advanced Chipset Features

Choose "Advanced Chipset Features" from the Main Menu and a list of
option will appear:
Phoenix - AwardBIOS CMOS Setup Utility
DRAM Clock/Drive Control
CPU OverClock in MHz
AGP OverClock in MHz
AGP Aperture Size (MB)
AGP 3.0 Speed
x AGP 2.0 Speed
AGP Fast Write
AGP Sideband Address
HT Frequency
Special I/O for PCI Card
x Base I/O Address
x I/O Length
System BIOS Cacheable
: Move Enter: Select
F5: Previous Values

4-6.4.1 DRAM Configuration

Choose "DRAM Configuration" in "Advanced Chipset Features" and
press <Enter>. The following sub-screen will appear for DRAM Control
configuration:
Max MemClock (Mhz)
CAS# Latency
RAS# to CAS# delay (tRCD)
Min RAS# active time (tRAS)
Row precharge Time (tRP)
Max MemClock (Mhz) This item allows you to set the DRAM Clock if "DRAM
CAS# Latency With "DRAM Timing Setting by" setting to Manual,
RAS# to CAS# delay
(tRCD)
Advanced Chipset Features
Press Enter
200
66
64MB
Auto
Auto
Auto
Auto
4x
Disabled
0000
1 Byte
Enabled
+/-/PU/PD: Value F10: Save
F6: Fail-Safe Defaults
DRAM Configuration
200
2,5
Auto
Auto
Auto
Timing Setting by" is set to Manual.
Choices: 100MHz; 133MHz; 166MHz; 200MHz
you can select the SDRAM CAS# (Column Address
Strode) latency manually.
Choices: Auto; 2.0; 2.5; 3.0
This value appears when "DRAM Timing Setting by"
is set at "Manual". Choices: Auto; 2~7 Bus Clocks
61
Chapter 4 BIOS Setup
Item Help
Menu Level
Esc: Exit F1: General Help
F7: Optimized Defaults
Item Help
Menu Level