Spi, I2C, And Relay Configuration; Gpio; Table 3-2: Dlap-211-Jnxs Gpio Map Table; Table 3-3: Dlap-211-Jt2S Gpio Map Table - ADLINK Technology DLAP-211-Nano Series User Manual

Edge inference system
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3.4 SPI, I2C, and Relay Configuration

The DLAP-211-JT2S, DLAP-211-NanoS, and DLAP-211-JNXS
support I2C, SPI, GPIO, and Relay functions through a 37-pin D-
sub connector that can be accessed through the commands
described in the following sections.
3.4.1

GPIO

DLAP-211-JNXS GPIO map table:
Pin
Signal
11
GPO 1
12
GPO 2
13
GPO 3
14
GPO 4

Table 3-2: DLAP-211-JNXS GPIO Map Table

DLAP-211-JT2S GPIO map table:
Pin
Signal
11
GPO 1
12
GPO 2
13
GPO 3
14
GPO 4

Table 3-3: DLAP-211-JT2S GPIO Map Table

DLAP-211-NanoS GPIO map table:
Pin
Signal
11
GPO 1
12
GPO 2
13
GPO 3
14
GPO 4

Table 3-4: DLAP-211-NanoS GPIO Map Table

30
GPIO Number Pin
gpio345
15
gpio268
16
gpio417
17
gpio267
18
GPIO Number Pin
gpio278
15
gpio338
16
gpio337
17
gpio340
18
GPIO Number Pin
gpio39
15
gpio194
16
gpio169
17
gpio64
18
Signal
GPIO Number
GPI 1
gpio266
GPI 2
gpio265
GPI 3
gpio264
GPI 4
gpio419
Signal
GPIO Number
GPI 1
gpio408
GPI 2
gpio411
GPI 3
gpio410
GPI 4
gpio409
Signal
GPIO Number
GPI 1
gpio63
GPI 2
gpio65
GPI 3
gpio66
GPI 4
gpio62
Using the System

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