Analog Devices AD9776A Manual page 37

Table 21. Typical VCO Frequency Range vs. PLL Band Select Value
PLL Lock Ranges over Temperature, −40°C to +85°C
PLL Band Select
111111 (63)
111110 (62)
111101 (61)
111100 (60)
111011 (59)
111010 (58)
111001 (57)
111000 (56)
110111 (55)
110110 (54)
110101 (53)
110100 (52)
110011 (51)
110010 (50)
110001 (49)
110000 (48)
101111 (47)
101110 (46)
101101 (45)
101100 (44)
101011 (43)
101010 (42)
101001 (41)
101000 (40)
100111 (39)
100110 (38)
100101 (37)
100100 (36)
100011 (35)
100010 (34)
100001 (33)
100000 (32)
011111 (31)
011110 (30)
011101 (29)
011100 (28)
011011 (27)
011010 (26)
011001 (25)
011000 (24)
010111 (23)
010110 (22)
010101 (21)
010100 (20)
010011 (19)
010010 (18)
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VCO Frequency Range in MHz
f f
LOW HIGH
Auto mode
1975 2026
1956 2008
1938 1992
1923 1977
1902 1961
1883 1942
1870 1931
1848 1915
1830 1897
1822 1885
1794 1869
1779 1853
1774 1840
1748 1825
1729 1810
1730 1794
1699 1780
1685 1766
1684 1748
1651 1729
1640 1702
1604 1681
1596 1658
1564 1639
1555 1606
1521 1600
1514 1575
1480 1553
1475 1529
1439 1505
1435 1489
1402 1468
1397 1451
1361 1427
1356 1412
1324 1389
1317 1375
1287 1352
1282 1336
1250 1313
1245 1299
1215 1277
1210 1264
1182 1242
1174 1231
PLL Lock Ranges over Temperature, −40°C to +85°C
PLL Band Select
010001 (17)
010000 (16)
001111 (15)
001110 (14)
001101 (13)
001100 (12)
001011 (11)
001010 (10)
001001 (9)
001000 (8)
000111 (7)
000110 (6)
000101 (5)
000100 (4)
000011 (3)
000010 (2)
000001 (1)
000000 (0)
Configuring PLL Band Select with Temperature Sensing
1. The values of N1 (Register 0x09, Bits<6:5>) and N2
(Register 0x09, Bits<4:3>) should be programmed along
with the PLL settings shown in Table 20.
2. Set the PLL band (Register 0x08, Bits<7:2>) to 63 to enable
PLL auto mode.
3. Wait for the PLL_LOCK pin or the PLL lock indicator
(Register 0x00, Bit 1) to go high. This should occur within
5 ms.
4. Read back the 6-bit PLL band (Register 0x08, Bits<7:2>).
5. Based on the temperature when the PLL auto band select is
performed, set the PLL band indicated in either Table 22 or
Table 23 by rewriting the readback values into the PLL
Band Select parameter (Register 0x08, Bits<7:2>).
If the optimal band is in the range of 0 to 31 (lower VCO
frequency), refer to Table 22.
Table 22. Setting Optimal PLL Band, When Band Is in the
Lower Range (0 to 31)
If System Startup
Temperature Is
−40°C to −10°C
−10°C to +15°C
15°C to 55°C
55°C to 85°C
Rev. 0 | Page 37 of 60
AD9776A/AD9778A/AD9779A
VCO Frequency Range in MHz
f f
LOW HIGH
1149 1210
1141 1198
1115 1178
1109 1166
1086 1145
1078 1135
1055 1106
1047 1103
1026 1067
1019 1072
998 1049
991 1041
976 1026
963 1011
950 996
935 981
922 966
911 951
Set PLL Band as Follows
Set PLL band = readback band + 2
Set PLL band = readback band + 1
Set PLL band = readback band
Set PLL band = readback band − 1