Changes To Pin 39 Description, Table 9 - Analog Devices AD9776A Manual

AD9776A/AD9778A/AD9779A
CVDD18
CVDD18
REFCLK+
REFCLK–
CVDD18
CVDD18
SYNC_I+
SYNC_I–
DVDD18
P1D<15>
P1D<14>
P1D<13>
P1D<12>
P1D<11>
DVDD18
P1D<10>
Table 9. AD9779A Pin Function Descriptions
Pin
No. Mnemonic Description
1 CVDD18 1.8 V Clock Supply.
2 CVDD18 1.8 V Clock Supply.
3 CGND Clock Ground.
4 CGND Clock Ground.
5 REFCLK+ Differential Clock Input.
6 REFCLK− Differential Clock Input.
7 CGND Clock Ground.
8 CGND Clock Ground.
9 CVDD18 1.8 V Clock Supply.
10 CVDD18 1.8 V Clock Supply.
11 CGND Clock Ground.
12 AGND Analog Ground.
13 SYNC_I+ Differential Synchronization Input.
14 SYNC_I− Differential Synchronization Input.
15 DGND Digital Ground.
16 DVDD18 1.8 V Digital Supply.
17 P1D<15> Port 1, Data Input D15 (MSB).
18 P1D<14> Port 1, Data Input D14.
19 P1D<13> Port 1, Data Input D13.
20 P1D<12> Port 1, Data Input D12.
21 P1D<11> Port 1, Data Input D11.
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100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76
1
PIN 1
2
CGND
3
CGND
4
5
6
CGND
7
CGND
8
9
10
CGND
11
AGND 12
13
14
DGND 15
16
17
18
19
20
21
DGND 22
23
24
P1D<9>
25
26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
ANALOG DOMAIN
DIGITAL DOMAIN
AD9779A
TOP VIEW
(Not to Scale)
Figure 5. AD9779A Pin Configuration
Pin
No. Mnemonic
22 DGND
23 DVDD18
24 P1D<10>
25 P1D<9>
26 P1D<8>
27 P1D<7>
28 P1D<6>
29 P1D<5>
30 P1D<4>
31 P1D<3>
32 DGND
33 DVDD18
34 P1D<2>
35 P1D<1>
36 P1D<0>
37 DATACLK
38 DVDD33
39 TXENABLE
40 P2D<15>
41 P2D<14>
Rev. A | Page 12 of 60
75 I120
VREF
74
IPTAT
73
AGND
72
IRQ
71
70 RESET
CSB
69
SCLK
68
SDIO
67
66 SDO
PLL_LOCK
65
64 DGND
63 SYNC_O+
SYNC_O–
62
61 DVDD33
DVDD18
60
59 P2D<0>
58 P2D<1>
57 P2D<2>
56 P2D<3>
P2D<4>
55
54 DGND
DVDD18
53
52 P2D<5>
P2D<6>
51
Description
Digital Ground.
1.8 V Digital Supply.
Port 1, Data Input D10.
Port 1, Data Input D9.
Port 1, Data Input D8.
Port 1, Data Input D7.
Port 1, Data Input D6.
Port 1, Data Input D5.
Port 1, Data Input D4.
Port 1, Data Input D3.
Digital Ground.
1.8 V Digital Supply.
Port 1, Data Input D2.
Port 1, Data Input D1.
Port 1, Data Input D0 (LSB).
Data Clock Output.
3.3 V Digital Supply.
Transmit Enable. In single port mode, this
pin also functions as IQSELECT.
Port 2, Data Input D15 (MSB).
Port 2, Data Input D14.