Tektronix AWG5000B Series Service Manual page 32

Power (PWR2) Board
CLK1G Board
AWG1G Board
AWG5000B and AWG5000C Series Service Manual
The PWR2 board provides DC power to the fans, HDD, CD Drive, μATX board,
MIO board, OUT1G board, and AWG1G board. All the power comes from the
power supply and secondary power supply modules. The fan control circuit has
a thermal sensor on this board. DC voltage to the fans is controlled relative to
the sensed temperature. DC-DC converters are included for generating different
DC voltages.
The CLK1G board provides a 600 MHz to 1200 MHz clock to the AWG1G board.
The clock input accepts 600 MHz to 1200 MHz clock signals from an external
signal source. The reference clock input accepts 10 MHz to 800 MHz reference
clock signals from an external signal source. The 10 MHz reference output can be
used for synchronizing frequency between two or more instruments. The CLK1G
board consists of the following blocks:
VCO (600 MHz to 1200 MHz)
Fractional-N PLL
10.0 MHz TCXO (reference oscillator)
External reference input
The AWG1G board generates arbitrary waveforms based on the waveform
memory and the sequence memory. There are two types of PLDs (Xilinx FPGA)
on the board. One is an AWG controller called PLD121 which interfaces to/from
the MIO board. The other is a memory controller called PLD120 which generates
waveform patterns. Waveform data is stored in ZBT type SRAMs. The sequence
memory is included in the memory controller PLD. The AWG1G board consists
of the following blocks:
1.2 GS/s DAC (AD9736)
8 channels 8:1 MUX (TEK0015 ASIC)
PLD120 (Xilinx Virtex-4 FPGA) as a memory controller
PLD121 (Xilinx Virtex-4 FPGA) as an AWG controller
ZBT type SRAM for the waveform memory
28 bits digital output driver
Marker output driver
Trigger and event inputs
DC output
DC-DC converter
Theory of Operation
2–7