Appendix A. Himax Hm01B0 Upduino Shield Board Schematics; Figure A.1. Upduino 2.0 Fpga Schematic - Lattice Semiconductor Himax HM01B0 User Manual

Upduino shield
Hide thumbs Also See for Himax HM01B0:
Table of Contents

Advertisement

Appendix A. Himax HM01B0 UPduino Shield Board Schematics

DUT CONNECTION
+1.2V
VCC
R1
1
C4
0.1uF
GND
+1.2V
R2
100
C9
0.1uF
+3.3V
GND
C6
0.1uF
VCCIO3
GND
C8
0.1uF
+1.2V
+3.3V
J2
J3
GND
0
0
+3.3V
VCCIO2
A
LED-TRICOLOR
+1.2V
+3.3V
J5
J4
0
0
VCCIO3
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-UG-02081-1.0
U4
ICE40UP5K/3K-SG48
5
VCC
IOB_35B_SPI_SS
30
VCC
IOB_34A_SPI_SCK
IOB_33B_SPI_SI
IOB_32A_SPI_SO
29
VCCPLL
24
VPP_2V5
33
VCCIO_0
D1
CDBU0130R
IOT_37A
23
IOT_37A
25
IOT_36B
IOT_36B
IOT_39A
26
IOT_39A
IOT_38B
27
IOT_38B
IOT_43A
32
IOT_43A
IOT_42B
31
IOT_42B
IOT_45A_G1
37
IOT_45A_G1
IOT_44B
34
IOT_44B
43
IOT_49A
IOT_49A
IOT_48B
36
IOT_48B
IOT_51A
42
IOT_51A
38
IOT_50B
IOT_50B
IOT_41A
28
IOT_41A
IOT_46B_G0
35
IOT_46B_G0
LED
LED_BLUE
39
RGB2
RED
40
LED_GREEN
RGB1
BLU
LED_RED
41
RGB0
GRN
GND
+3.3V
CRESET_B
PART NO= 77311-801-02LF

Figure A.1. UPduino 2.0 FPGA Schematic

© 2018 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
+3.3V
22
SPI_VCCIO1
+3.3V
16
ICE_SS
15
ICE_SCK
17
ICE_MOSI
14
ICE_MISO
8
CRESET_B
CRESET_B
7
CDONE
12
IOB_22A
IOB_22A
21
IOB_23B
IOB_23B
TP
13
IOB_24A
IOB_24A
20
IOB_25B_G3
IOB_25B_G3
19
GND
IOB_29B
IOB_29B
18
TP4
IOB_31B
IOB_31B
TP
11
IOB_20A
IOB_20A
10
IOB_18A
IOB_18A
9
IOB_16A
IOB_16A
6
TP3
IOB_13B
IOB_13B
VCCIO2
1
VCCIO_2
4
IOB_8A
IOB_8A
3
IOB_9B
IOB_9B
48
IOB_4A
IOB_4A
45
IOB_5B
IOB_5B
47
IOB_2A
IOB_2A
44
IOB_3B_G6
IOB_3B_G6
46
IOB_0A
IOB_0A
2
IOB_6A
IOB_6A
Himax HM01B0 UPduino Shield
User Guide
15

Advertisement

Table of Contents
loading

Table of Contents