Analog Input Selection (Bits 2:0); Active Level Control - Address 0Ch; Active High/ Low (Bit 0); Status - Address 0Dh - Cirrus Logic CS5346 Manual

PGASoft
0
0
1
1
7.8.2

Analog Input Selection (Bits 2:0)

Function:
These bits are used to select the input source for the PGA and ADC. Please see
Sel2
0
0
0
0
1
1
1
1
7.9

Active Level Control - Address 0Ch

7 6
Reserved Reserved
7.9.1

Active High/ Low (Bit 0)

Function:
When this bit is set, the INT pin functions as an active high CMOS driver.
When this bit is cleared, the INT pin functions as an active low open drain driver and will require an exter-
nal pull-up resistor for proper operation.
7.10

Status - Address 0Dh

7 6
Reserved Reserved
For all bits in this register, a '1' means the associated condition has occurred at least once since the register
was last read. A '0' means the associated condition has NOT occurred since the last reading of the register.
Status bits that are masked off in the associated mask register will always be '0' in this regi s ter. This register
defaults to 00h.
32
PGAZeroCross
0
1
0
1

Table 11. PGA Soft Cross or Zero Cross Mode Selection

Sel1 Sel0
0 0
0 1
1 0
1 1
0 0
0 1
1 0
1 1

Table 12. Analog Input Multiplexer Selection

5 4
Reserved Reserved
5 4
Reserved Reserved
Changes to affect immediately
Zero Cross enabled
Soft Ramp enabled
Soft Ramp and Zero Cross enabled (default)
PGA/ADC Input
Microphone-Level Inputs (+32 dB Gain Enabled)
Line-Level Input Pair 1
Line-Level Input Pair 2
Line-Level Input Pair 3
Line-Level Input Pair 4
Line-Level Input Pair 5
Line-Level Input Pair 6
3
Reserved Reserved
3
ClkErr Reserved
Mode
Table
Reserved
2 1
Reserved
2 1
Ovfl
CS5346
12.
0
Active_H/L
0
Undrfl
DS861PP3