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7.7
Channel A PGA Control - Address 08h
7
6
Reserved
Reserved
7.7.1
Channel A PGA Gain (Bits 5:0)
Function:
Sets the gain or attenuation for the ADC input PGA stage. The gain may be adjusted from -12 dB to
+12 dB in 0.5 dB steps. The gain bits are in two's complement with the Gain0 bit set for a 0.5 dB step.
Register settings outside of the ±12 dB range are reserved and must not be used. See
ample settings.
7.8
ADC Input Control - Address 09h
7
6
Reserved
Reserved
7.8.1
PGA Soft Ramp or Zero Cross Enable (Bits 4:3)
Function:
Soft Ramp Enable
Soft Ramp allows level changes, both muting and attenuation, to be implemented by incrementally ramp-
ing, in 1/8 dB steps, from the current level to the new level at a rate of 1 dB per 8 left/right clock periods.
See
Table
11.
Zero Cross Enable
Zero Cross Enable dictates that signal-level changes, either by attenuation changes or muting, will occur
on a signal zero crossing to minimize audible artifacts. The requested level change will occur after a time-
out period between 512 and 1024 sample periods (10.7 ms to 21.3 ms at 48 kHz sample rate) if the signal
does not encounter a zero crossing. The zero cross function is independently monitored and implemented
for each channel. See
Soft Ramp and Zero Cross Enable
Soft Ramp and Zero Cross Enable dictate that signal-level changes, either by attenuation changes or mut-
ing, will occur in 1/8 dB steps and be implemented on a signal zero crossing. The 1/8 dB level change will
occur after a time-out period between 512 and 1024 sample periods (10.7 ms to 21.3 ms at 48 kHz sam-
ple rate) if the signal does not encounter a zero crossing. The zero cross function is independently mon-
itored and implemented for each channel. See
DS861PP3
5
4
Gain5
Gain4
Gain[5:0]
101000
000000
011000
Table 10. Example Gain and Attenuation Settings
5
4
Reserved
PGASoft
Table
11.
3
2
Gain3
Gain2
Setting
-12 dB
0 dB
+12 dB
3
2
PGAZero
Sel2
Table
11.
CS5346
1
0
Gain1
Gain0
Table 10
for ex-
1
0
Sel1
Sel0
31
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