Serial Ata Interface - Xilinx Virtex-5 FPGA ML555 User Manual

Chapter 3: Hardware Description

Serial ATA Interface

The ML555 board provides a single Serial ATA (SATA) disk drive interface connector, J5,
for attachment to an external SATA disk drive. The board supports 1.5 Gbps and 3 Gbps
SATA baud rates. A second SATA interface can be supported using the SMA connectors on
the board and an external SMA to SATA interface board available from Xilinx with part
number HW-AFX-SMA-SATA. The SATA and SMA transceivers are connected to a
common GTP primitive block in the FPGA.
One of the two provided clock synthesizer modules must be used to generate a 150 MHz
reference clock for the SATA GTP transceiver.
The ML555 board does not provide DC power to the drive. An external DC power supply
must provide the drive power. The SATA signal interface cable is not supplied with the
development kit.
Xilinx Alliance Partners have IP cores that can be licensed for development and fielding a
SATA interface solution. The available Alliance Partners IP cores can be found at
www.xilinx.com/alliance/.
XAPP870
physical link initialization between the GTP transceiver in the Virtex-5 LXT FPGA and an
external SATA device.
Table 3-8
board does not provide DC power for the SATA drives.
Table 3-8: SATA Connector
Notes:
1. NC = no connect.
2. The Host side transceiver ports are AC coupled with a 0.01 μF capacitor. The SATA interface is
40
[Ref 11] provides a reference design demonstrating how to complete the SATA
lists the signal names and pin assignments for the SATA connector. The ML555
J5
1
2
3
4
5
6
7
connected to GTP_DUAL tile X0Y5.
www.xilinx.com
Signal
GND
(2)
SATA_TXP
(2)
SATA_TXN
GND
(2)
SATA_RXN
(2)
SATA_RXP
GND
Virtex-5 FPGA ML555 Development Kit
FPGA Pin
(1)
NC
B4
B3
NC
A2
A3
NC
UG201 (v1.4) March 10, 2008
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