Documentation And Reference Design Cd; Initial Board Checks Before Applying Power - Xilinx Virtex-5 FPGA ML555 User Manual

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Getting Started
This chapter describes the items needed to configure the Virtex-5 FPGA ML555 board. The
ML555 board is tested prior to shipment and should work out of the box. The installer is
recommended to inspect the board prior to use and confirm proper jumper and switch
settings as directed in this user guide.
The ML555 board must be plugged into either a parallel bus expansion slot for PCI systems
or a serial system bus expansion slot for PCI Express systems. The DC power provided to
the ML555 board from the PCI Express and PCI buses is different. The ML555 system
power configuration must be properly configured through board headers and shunts prior
to plugging into the system unit. Failure to configure the ML555 DC power system might
result in damage to the ML555 board or the system unit.
Contact Xilinx Technical Support with any questions about proper configuration of the
ML555 prior to powering up a system at:

Documentation and Reference Design CD

The CD included in the Virtex-5 FPGA ML555 board kit contains the board design files,
including schematics, PCB layout, and bill of materials. FPGA and CPLD design constraint
files are included on the CD. This file provides a signal listing and physical FPGA pin
locations (LOC) constraint to get started designing user applications with the Xilinx ISE
software. Signal names can be changed to match user preferences if the board schematic
signal names are not identical to the top-level user design file names. Open the
ReadMe.txt file on the CD to review the list of contents.

Initial Board Checks Before Applying Power

Note:
1.
2.
3.
4.
5.
The ML555 board now can be plugged into a powered down 3.3V (only) add-in card slot
for PCI Express or PCI/PCI-X operation. See the cd_rom.txt file on the CD.
Virtex-5 FPGA ML555 Development Kit
UG201 (v1.4) March 10, 2008
http://www.xilinx.com/support/clearexpress/websupport.htm
These steps MUST be performed before plugging in the ML555 board:
Set up the Configuration Mode Switch SW5 for Master SelectMAP. See
page 89 and Figure 4-2, page
Configure Jumper Block P2 to select configuration CCLK source (FPGA). See
Table 4-7, page 100 and Figure 4-8, page
Configure Jumper Block P3 to select one of four Platform Flash configuration files or
use JTAG programming cable to load user design. See
Switch SW8: selects the FPGA V
"ML555 DC Power System," page
Jumper Block P18: enables the 12V to 5V enable for PCI Express operation as described
in "ML555 DC Power System," page
www.xilinx.com
89.
100.
Table 3-37, page
source (PCI or PCI Express bus) as described in
CCINT
75.
75.
Chapter 2
Table 4-1,
86.
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