Board Modifications; Bypassing The Usb Programming Interface; Applying External Power; Measuring Bank And Core Voltages - Lattice Semiconductor MachXO 2280 User Manual

MachXO 2280 Breakout Board Evaluation Kit
Evaluation Board User Guide

7.3. Board Modifications

This section describes modifications to the board to change or add functionality.

7.3.1. Bypassing the USB Programming Interface

The USB programming interface circuit
removing the 0 Ω resistors: R3, R4, R7, and R9 (See
Header landing J1 provides JTAG signal access for jumper wires or a 1 × 8 pin header.

7.3.2. Applying External Power

The Breakout Board is powered by the circuit of
You may disconnect this power source by removing the 0 Ω resistors: R47 (VCCIO 3.3 V, Bank 0), R48 (VCCIO 3.3 V, Bank
1), R53 (VCCIO 3.3 V, Bank 4), R54 (VCCIO 3.3 V, Bank 5), R55 (VCCIO 3.3 V, Bank 2), R56 (VCCIO 3.3 V, Bank 3), R57
(VCCIO 3.3 V, Bank 6), R58 (VCCIO 3.3 V, Bank 7), R160 (VCC core) and R162 (VCCAUX). Power connections are
available from the expansion header landing, J9,

7.3.3. Measuring Bank and Core Voltages

Test points (TP1, through TP10) provide access to power supplies of the LCMXO2280C PLD. 0 Ω resistors: R47
(VCCIO 3.3 V, Bank 0), R48 (VCCIO 3.3 V, Bank 1), R53 (VCCIO 3.3 V, Bank 4), R54 (VCCIO 3.3 V, Bank 5), R55 (VCCIO 3.3
V, Bank 2), R56 (VCCIO 3.3 V, Bank 3), R57 (VCCIO 3.3 V, Bank 6), R58 (VCCIO 3.3 V, Bank 7), R160 (VCC core) and R162
(VCCAUX) can be removed to add a current meter inline or add a resistor shunt to measure voltage across.

7.4. Mechanical Specifications

Dimensions: 3 in. [L] x 3 in. [W] x 1/2 in. [H]

7.5. Environmental Requirements

The evaluation board must be stored between -40° C and 100° C. The recommended operating temperature is between
0° C and 90° C.
The board can be damaged without proper anti-static handling.
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All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
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(USB Programming and Debug Interface
Appendix A. Board

Figure A.2. USB Interface to JTAG

Figure A.3. Connectors and
section) may be optionally bypassed by
Schematics, Figure A.2. USB Interface to
based on the 5V USB power source.
LEDs.
JTAG).
FPGA-EB-02038-1.2