Texas Instruments SimpleLink CC2652PSIP Manual page 28

CC2652PSIP
SWRS263A – FEBRUARY 2021 – REVISED JUNE 2022
8.15.4 Comparators
8.15.4.1 Low-Power Clocked Comparator
T = 25 °C, V = 3.0 V, unless otherwise noted.
c DDS
PARAMETER
Input voltage range
Clock frequency
(1)
Internal reference voltage
Offset
Decision time
(1) The comparator can use an internal 8 bits DAC as its reference. The DAC output voltage range depends on the reference voltage
selected. See Section 8.15.2.1
8.15.4.2 Continuous Time Comparator
T = 25°C, V = 3.0 V, unless otherwise noted.
c DDS
PARAMETER
(1)
Input voltage range
Offset
Decision time
Current consumption
(1) The input voltages can be generated externally and connected throughout I/Os or an internal reference voltage can be generated using
the DAC
8.15.5 Current Source
8.15.5.1 Programmable Current Source
T = 25 °C, V = 3.0 V, unless otherwise noted.
c DDS
PARAMETER
Current source programmable output range (logarithmic
range)
Resolution
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TEST CONDITIONS
Using internal DAC with VDDS as reference voltage,
DAC code = 0 - 255
Measured at V / 2, includes error from internal DAC
DDS
Step from –50 mV to 50 mV
TEST CONDITIONS
Measured at V / 2
DDS
Step from –10 mV to 10 mV
Internal reference
TEST CONDITIONS
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MIN TYP MAX
0 V
DDS
SCLK_LF
0.024 - 2.865
±5
1
MIN TYP MAX
0 V
DDS
±5
0.78
8.6
MIN TYP MAX
0.25 - 20
0.25
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UNIT
V
V
mV
Clock
Cycle
UNIT
V
mV
µs
µA
UNIT
µA
µA