Texas Instruments SimpleLink CC2652PSIP Manual page 24

CC2652PSIP
SWRS263A – FEBRUARY 2021 – REVISED JUNE 2022
T = 25 °C, V = 3.0 V and voltage scaling enabled, unless otherwise noted.
c DDS
Performance numbers require use of offset and gain adjustements in software by TI-provided ADC drivers.
PARAMETER
Input impedance
(1) Using IEEE Std 1241-2010 for terminology and test methods
(2) Input signal scaled down internally before conversion, as if voltage range was 0 to 4.3 V
(3) Applied voltage must be within Absolute Maximum Ratings (see Section 8.1 ) at all times
(4) No missing codes
n
(5) ADC_output = Σ(4 samples ) >> n, n = desired extra bits
8.15.2 DAC
8.15.2.1 Digital-to-Analog Converter (DAC) Characteristics
T = 25 °C, V = 3.0 V, unless otherwise noted.
c DDS
PARAMETER
General Parameters
Resolution
V Supply voltage
DDS
F Clock frequency
DAC
Voltage output settling time
External capacitive load
External resistive load
Short circuit current
Max output impedance Vref =
Z VDDS, buffer ON, CLK 250
MAX
kHz
Internal Load - Continuous Time Comparator / Low Power Clocked Comparator
Differential nonlinearity
DNL
Differential nonlinearity
(2)
Offset error
Load = Continuous Time
Comparator
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TEST CONDITIONS
200 kSamples/s, voltage scaling enabled. Capacitive input,
Input impedance depends on sampling frequency and sampling
time
TEST CONDITIONS
Any load, any V , pre-charge OFF, DAC charge-pump ON
REF
(4)
External Load , any V , pre-charge OFF, DAC charge-pump
REF
OFF
Any load, V = DCOUPL, pre-charge ON
REF
Buffer ON (recommended for external load)
Buffer OFF (internal load)
V = VDDS, buffer OFF, internal load
REF
V = VDDS, buffer ON, external capacitive load = 20 pF
REF
VDDS = 3.8 V, DAC charge-pump OFF
VDDS = 3.0 V, DAC charge-pump ON
VDDS = 3.0 V, DAC charge-pump OFF
VDDS = 2.0 V, DAC charge-pump ON
VDDS = 2.0 V, DAC charge-pump OFF
VDDS = 1.8 V, DAC charge-pump ON
VDDS = 1.8 V, DAC charge-pump OFF
V = VDDS,
REF
load = Continuous Time Comparator or Low Power Clocked
Comparator
F = 250 kHz
DAC
V = VDDS,
REF
load = Continuous Time Comparator or Low Power Clocked
Comparator
F = 16 kHz
DAC
V = VDDS = 3.8 V
REF
V = VDDS= 3.0 V
REF
V = VDDS = 1.8 V
REF
V = DCOUPL, pre-charge ON
REF
V = DCOUPL, pre-charge OFF
REF
V = ADCREF
REF
Product Folder Links:
(1)
MIN
MIN
1.8
2.0
2.6
16
16
(3)
10
Copyright © 2022 Texas Instruments Incorporated
CC2652PSIP
www.ti.com
TYP MAX UNIT
>1 MΩ
TYP MAX UNIT
8 Bits
3.8
3.8 V
3.8
250
kHz
1000
13
1 / F
DAC
13.8
20 200 pF
MΩ
400 µA
51.1
53.1
54.3
48.7 kΩ
70.2
49.4
79.2
±1
(1)
LSB
±1.2
±0.64
±0.81
±1.27
(1)
LSB
±3.43
±2.88
±2.37