Appendix B: Hspice And Hyperlynx/Eldo Correlation Results; Introduction - Xilinx Spartan-6 User Manual

Fpga gtp transceiver signal integrity simulation kit

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HSPICE and HyperLynx/Eldo

Correlation Results

Introduction

The results generated by the HyperLynx and Eldo simulators are validated by executing a

set of the same simulations in both simulators and plotting the waveform results on top of

each other to verify identical outcomes.

Note:

REFCLK and GTP transceiver simulations.

For this correlation, only the silicon models for the GTP transmitter and receiver are used.

Package and channel models are not used, except for the GTP reference clock, where the

package model is included.

Table B-1

Table B-1: GTP Transceiver Simulations Parametric Settings

Typical Process Corner with Typical Voltage and Typical Temperature

Fast Process Corner with Maximum Voltage and Cold Temperature

Slow Process Corner with Minimum Voltage and Hot Temperature

Spartan-6 FPGA GTP Transceiver SIS Kit (HyperLynx)

UG396 (v1.0) June 10, 2010

HSPICE version A-2009.03 was used for the S-parameter/circuit correlation and the GTP

lists the parameter settings used by the GTP transceiver simulations.

TXDIFFCTRL

4'b0000

4'b0100

4'b1010

www.xilinx.com

TXPREEMPHASIS

3'b000

3'b010

3'b100

3'b111

3'b000

3'b011

3'b000

3'b011

Appendix B

RXEQMIX

2'b00

2'b01

2'b10

2'b11

2'b00

Table of Contents

Appendix B: Hspice And Hyperlynx/Eldo Correlation Results; Introduction - Xilinx Spartan-6 User Manual

Introduction

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