I2C Interface Timing - Infineon AIROC CYBLE-343072-02 Manual

AIROC™ Bluetooth® LE module
Timing and AC characteristics
2
16.3 I C interface timing
2
Table 21 I C Interface Timing Specifications
Reference
1
Clock frequency
2
START condition setup time
3
START condition hold time
4
Clock low time
5
Clock high time
6
Data input hold time
7
Data input setup time
8
STOP condition setup time
9
Output valid from clock
10
Bus free time
Notes
16.As a transmitter, 125 ns of delay is provided to bridge the undefined region of the falling edge of SCL to avoid
unintended generation of START or STOP conditions.
17.Time that the bus must be free before a new transaction can start.
2
Figure 16 I C Interface timing diagram
Preliminary Datasheet
Characteristics
[16]
[17]
41 of 58
Min Max Unit
100
400
– kHz
800
1000
650 –
280 –
650 –
280 –
0 – ns
100 –
280 –
– 400
650 –
002-33419 Rev. **
2021-07-22