Triac Control; Peripheral Uart Interface; Serial Peripheral Interface - Infineon AIROC CYBLE-343072-02 Manual

AIROC™ Bluetooth® LE module
Peripheral and communication interfaces
Table 9 Common baud rate examples, 24 MHz clock
Baud rate (bps)
115200
57600
38400
Table 10 contains example values to generate common baud rates with a 48 MHz UART clock.
Table 10 Common baud rate examples, 48 MHz clock
Baud rate (bps)
6M
4M
3M
2M
1.5M
1M
921600
230400
115200
57600
Normally, the UART baud rate is set by a configuration record downloaded after reset. Support for changing the
baud rate during normal HCI UART operation is included through a vendor-specific command that allows the host
to adjust the contents of the baud rate registers.
The CYBLE-3x307x-02 UART operates correctly with the host UART as long as the combined baud rate error of the
two devices is within ±2%.
8.3

Triac control

The CYBLE-3x307x-02 includes hardware support for zero-crossing detection and trigger control for up to four
triacs. The CYBLE-3x307x-02 detects zero-crossing on the AC zero detection line and uses that to provide a pulse
that is offset from the zero crossing. This allows the CYBLE-3x307x-02 to be used in dimmer applications, as well
as any other applications that require a control signal that is offset from an input event.
The zero-crossing hardware includes an option to suppress glitches.
8.4

Peripheral UART interface

The CYBLE-3x307x-02 has a second UART that may be used to interface to peripherals. This peripheral UART is
accessed through the optional I/O ports, which can be configured individually and separately for each functional
pin. The CYBLE-3x307x-02 can map the peripheral UART to any LHL GPIO. The peripheral UART clock is fixed at
24 MHz. Both TX and RX have a 256-byte FIFO (see
8.5

Serial peripheral interface

The CYBLE-3x307x-02 has two independent SPI interfaces, both of which support single, dual, and quad mode
SPI operations. Either interface can be a master or a slave. Each interface has a 64-byte transmit buffer and a
64-byte receive buffer. To support more flexibility for user applications, the CYBLE-3x307x-02 has optional I/O
ports that can be configured individually and separately for each functional pin. The CYBLE-3x307x-02 acts as an
Preliminary Datasheet
Baud rate adjustment
High nibble Low nibble
0x00
0x00
0x01
High rate Low rate
0xFF
0xFF
0x0
0x44
0x0
0x0
0x22
0x0
0x1
0x1
Table 4 on page
26 of 58
(continued)
Mode
0x00 Normal
0x00 Normal
0x00 Normal
Mode
0xF8 High rate
0xF4 High rate
0xFF Normal
0xFF Normal
0xFE Normal
0xFD Normal
0xFD Normal
0xF3 Normal
0xE6 Normal
0xCC Normal
14).
Error (%)
0.16
0.16
0.00
Error (%)
0
0
0
0
0
0
0.16
0.16
–0.08
0.04
002-33419 Rev. **
2021-07-22