Infineon AIROC CYBLE-343072-02 Manual page 40

AIROC™ Bluetooth® LE module
Timing and AC characteristics
Table 20 and Figure 15
Table 20 SPI mode 1 and 3
Reference
1 Time from master assert SPI_CSN to first clock edge
2 Hold time for MOSI data lines
3 Time from last sample on MOSI/MISO to slave deassert SPI_INT
4 Time from slave deassert SPI_INT to master deassert SPI_CSN
5 Idle time between subsequent SPI transactions
SPI_CSN
SPI_INT
(DirectWrite)
SPI_INT
(DirectRead)
SPI_CLK
(Mode 1)
SPI_CLK
(Mode 3)
SPI_MOSI
Not Driven
SPI_MISO
Figure 15 SPI timing – mode 1 and 3
Preliminary Datasheet
show the timing requirements when operating in SPI Mode 1 and 3.
Characteristics
1
2
Invalid bit
First bit
Invalid bit First bit
40 of 58
Min Max
45 –
12 ½ SCK
0 100
0 –
1 SCK –
5
3
Last bit
Not Driven
Last bit
002-33419 Rev. **
Unit
ns
2021-07-22