Part 3.13: Fmc Interface - Alinx AXU7EV User Manual

MIPI interface pin assignment
Signal Name
MIPI_CLK_N
MIPI_CLK_P
MIPI_LAN0_N
MIPI_LAN0_P
MIPI_LAN1_N
MIPI_LAN1_P
CAM_GPIO
CAM_CLK
CAM_SCL
CAM_SDA

Part 3.13: FMC Interface

The AXU7EV FPGA Carrier board has a standard FMC LPC expansion
port that can be connected to various FMC modules of XILINX or ALINX (HDMI
input and output modules, binocular camera modules, high-speed AD modules,
etc.). The FMC expansion port contains 36 pairs of differential IO signals and 8
pairs of GTX Transceivers.
The 36 pairs of differential signals of the FMC expansion port are
connected to the IO of the BANK28 and BANK64 of the ZYNQ Ultrascale+ chip.
The level standard is 1.8V, and the differential signal supports LVDS data
communication, 2 pairs of GTX transceiver signals are connected to BANK225.
The schematic diagram of ZYNQ Ultrascale+ and FMC connectors is shown in
Figure 3-13-1.
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ZYNQ Ultrascale + FPGA Board AXU7EV User Manual
ZYNQ Pin Name ZYNQ
Number
B65_L1_N
B65_L1_P
B65_L2_N
B65_L2_P
B65_L3_N
B65_3_P
B87_L5_N
B87_L5_P
B87_L11_P
B87_L11_N
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Pin
MIPI Input Clock Positive
AP20
MIPI Input Clock Negative
AP19
MIPI Input Date LANE0 Negative
AN19
MIPI Input Date LANE0 Positive
AM19
MIPI Input Date LANE1 Negative
AP22
MIPI Input Date LANE1 Positive
AP21
GPIO Control of Camera
M8
Clock Input of Camera
M9
I2C Clock of Camera
H7
I2C Data of Camera
G7
Description