Part 2.4: Qspi Flash - Alinx AXU7EV User Manual

PL_DDR4_BG0
PL_DDR4_CAS_B
PL_DDR4_CKE
PL_DDR4_CS_B
PL_DDR4_CLK_N
PL_DDR4_CLK_P

Part 2.4: QSPI Flash

The FPGA core board ACU7EV is equipped with two 256MBit Quad-SPI
FLASH chip to form an 8-bit bandwidth data bus, the flash model is
MT25QU256ABA1EW9, which uses the 1.8V CMOS voltage standard. Due to
the non-volatile nature of QSPI FLASH, it can be used as a boot device for the
system to store the boot image of the system. These images mainly include
FPGA bit files, ARM application code, and other user data files. The specific
models and related parameters of QSPI FLASH are shown in Table 2-4-1.
Position
U2, U3
QSPI FLASH is connected to the GPIO port of the BANK500 in the PS
section of the ZYNQ chip. In the system design, the GPIO port functions of
these PS ports need to be configured as the QSPI FLASH interface. Figure
2-4-1 shows the QSPI Flash in the schematic.
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ZYNQ Ultrascale + FPGA Board AXU7EV User Manual
IO_L7P_T1L_N0_QBC_AD13P_66
IO_L8N_T1L_N3_AD5N_66
IO_L15P_T2L_N4_AD11P_66
IO_L9P_T1L_N4_AD12P_66
IO_L13N_T2L_N1_GC_QBC_66
IO_L13P_T2L_N0_GC_QBC_66
Model
MT25QU256ABA1EW9
Table 2-4-1: QSPI FLASH Specification
Amazon Store: https://www.amazon.com/alinx
Capacity
256Mbit
AK13
AL10
AG13
AK12
AJ12
AH12
Factory
Winbond