Avnet COM Express MSC C6C-AL User Manual

Compact module type 6 pinout

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User Manual

COM Express

Compact Module

MSC C6C-AL

Type 6 Pinout

TM /

Intel

Atom

Celeron

/ Pentium

Series SOC

Rev. 1.0

2021-03-08

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Summary of Contents for Avnet COM Express MSC C6C-AL

Page 1 User Manual COM Express Compact Module MSC C6C-AL Type 6 Pinout ® TM / ® ® Intel Atom Celeron / Pentium Series SOC Rev. 1.0 2021-03-08...
Page 2 Preface Copyright Notice EMC Rules Copyright © 2017 MSC Technologies GmbH. All rights This unit has to be installed in a shielded housing. If not reserved. installed in a properly shielded enclosure, and used in accordance with the instruction manual, this product may Copying of this document, and providing to others and the cause radio interference in which case the user may be use or communication of the contents thereof, is forbidden...
Page 3 Support, please consult the respective pages on our web site www.msc-technologies.eu latest documentation, drivers and software downloads. If the information provided there does not solve your problem, please contact our Avnet Integrated / MSC Technical Support: Phone: +49 - 8165 906 - 200 Email: support@msc-technologies.eu...
Page 4: Table Of Contents
Contents 2.12.15 SPI Interface ..................40 USER INFORMATION ..................8 2.12.16 Module Type Definition ................ 41 About this Manual ................8 2.12.17 Power and GND ................... 42 Symbols and Signal Words..............8 2.13 Pin List for MSC C6C-AL Module (Type 6) ........42 Table Cells with Gray Text ..............
Page 5 6.8.11 CSM Configuration ................71 6.12 Save & Exit ..................104 6.8.12 NVMe Configuration ................72 6.13 Setup Controlled Update ..............107 6.8.13 SDIO Configuration ................73 6.14 Bios Update from EFI Shell ............. 109 6.8.14 USB Configuration ................74 6.15 Bios Update from Linux ..............
Page 6 Revision History Rev. Date Description 2021-03-08 First Release MSC C6C-AL MSC C6C-AL User Manual 6 / 128...
Page 7 Reference Documents COM Express Module Base Specification COM Express Revision 2.1 Last update: April 10 , 2012 PCI Local Bus Specification Rev. 2.1 PCI21.PDF Last update: June 1 , 1995 http://www.pcisig.com ATA/ATAPI-6 Specification d1410r3b.pdf http://www.t13.org/ Serial ATA Specification Serial ATA 1.0 gold.pdf Last update: August 29 , 2002 Rev.1.0 http://www.sata-io.org/...
Page 8: User Information
1 User Information About this Manual This user’s guide provides information about the components, features All safety messages have a safety alert symbol and are structured as and connectors available on the MSC C6C-AL COM Express follows: Compact Module. Danger, Warning or Caution Type of hazard Symbols and Signal Words Potential consequences of the hazard...
Page 9: Non-Intended Use
 NOTICE: Handle the Compact Module at electrostatic-free Non-intended use workstations only.  NOTICE: Use the compact module in the specified temperature ranges only!  NOTICE: Do not handle or store the Compact Module near strong electrostatic, electromagnetic, magnetic or radioactive ...
Page 10: Module Photos
Module Photos Top Side Memory Socket MAC Address Label Layout Revision Board Identification Number (BID) Board ID Label BIOS Label Camera Interface Connector System On Chip (SOC) Micro SD Card Connector Fan Connector Top Side View MSC C6C-AL MSC C6C-AL User Manual 10 / 128...
Page 11 Bottom side memory socket COM Express® connector Bottom Side View MSC C6C-AL MSC C6C-AL User Manual 11 / 128...
Page 12: Technical Description
2 Technical Description Introduction COM Express™ is an open specification from PICMG (PCI Industrial providing the interface infrastructure for the COM Express™ module Computer Manufacturer Group). It is a module concept to bring PCI using PC type connectors for external access. Express and other newer technologies like SATA, USB 3.0 and Currently four module sizes are defined in the COM Express different display interfaces onto a COM (Computer On Module).
Page 13: Key Features
Key Features The MSC C6C-AL COM Express module is designed as a type 6 module according to COM Express® Module Base Specification Revision 2.1. Key features include:   Module size: 95 mm x 95 mm Optional eMMC memory  ...
Page 14: Block Diagram
Block Diagram MSC C6C-AL MSC C6C-AL User Manual 14 / 128...
Page 15: Com Express Implementation
COM Express Implementation COM Express™ required and optional features for pin-out type 6 are summarized in the following table. The features identified as Minimum (Min.) shall be implemented by all modules. Features identified up to Maximum (Max) may be additionally implemented by a module. The column MSC C6C-AL shows the features implemented by the MSC module.
Page 16 C-D LAN Ports 1-2 C-D DDI 1-3 0 / 3 HDMI/DVI/DP C-D USB 3.0 Ports 0 / 4 System Management A-B SDIO (muxed on GPIO) 0 / 1 Max. UHS-I A-B General Purpose Inputs 4 / 4 A-B General Purpose Outputs 4 / 4 A-B SMBus 1 / 1...
Page 17: Functional Units
Functional Units ® CPUs Intel Atom x5-E3930, 2C, 1.30GHz, 1.80GHz, 2MiB L2 Cache, 6.5W, 2ch DDR3L. (APL-I) ® (Type 3 BGA 1296 Intel Atom x5- E3940, 4C, 1. 60GHz, 1.80GHz, 2MiB L2 Cache, 9.5W, 2ch DDR3L. (APL-I) package) ® Intel Atom x7-E3950, 4C, 1.60GHz, 2.00GHz, 2MiB L2 Cache, 12W, 2ch DDR3L.
Page 18 Storage Optional eMMC memory ® Camera interface 2x MIPI CSI 2.0 camera interface (Camera Serial Interface), CSI-2 D-PHY 1.1 x4 and CSI-2 D-PHY 1.2 x2 Serial Interface Two High Speed UARTs. (Functionality based on the 16550 and 16750 industry standards.) Watchdog Timer Embedded controller creates watchdog alert and system reset TPM TPM module, TPM 2.0, SLB9670 Fan Supply 4-pin header for support of a 12V PWM fan...
Page 19: Power Supply
Power Supply  +12V primary power supply input  +5V standby Voltage Input range Power Consumption Option, is not required for module operation. If not present, customer must ensure that the supply voltages which +12V +4.75V - 20 V are generated on the carrier board are switched off during suspend Refer to chapter 2.7 states, so that no current from the carrier board’s signal lines can +5V Standby...
Page 20 Win 10 TAT! BurnInTest Module / CPU Win 10 Idle average peak ® C6C-AL-E3930-N4261I (Intel Atom x5-E3930, 2C, 1.30GHz, 3.2 W 10.4 W 12.2 W 6.4 W 1.80GHz, 2MiB L2 Cache, 6.5W, 2ch DDR3L) ® C6C-AL-E3940-N5261I (Intel Atom x5- E3940, 4C, 1.60GHz, 3.0 W 14.9 W 15.3 W...
Page 21: Power Dissipation (Standby Modes)
2.7.2 Power Dissipation (Standby Modes) 1. System is shut down into “Suspend to RAM” (S3) by Windows 10 64-bit with Wake on LAN enabled. 2. System is shut down into “Soft Off” (S5) or “Suspend to Disk” (S4) by Windows 10 64-bit with Wake on LAN enabled. S4 / S5 Module / CPU Input Power...
Page 22: System Memory
System Memory The MSC C6C-AL CPU module provides two sockets for memory modules which have to meet the following demands:  204pin unbuffered non-ECC DDR3L SO-DIMM.  1.35V Supply Voltage  DDR3L-1333 / PC3L-10600, DDR3L-1600 / PC3L-12800, DDR3L-1867 / PC3L-14900 ...
Page 23: Mechanical Dimensions
Mechanical Dimensions Compact module 2.9.1 There are two height options defined in the COM Express specification: 5mm and 8mm. The height option is defined by the connectors on the baseboard. The modules with Atom APL-I CPUs are equipped with an integrated heat spreader.
Page 24: Thermal Specifications
2.10 Thermal specifications The cooling solution of a COM Express module is based on a heat- spreader concept. A heat-spreader is a metal plate (typically aluminum) mounted on the top of the module. The connection between this plate and the module components is typically done by thermal interface materials like phase change foils, gap pads and copper or aluminum blocks.
Page 25: Use Conditions
2.11 Use Conditions The Use Conditions define run-time parameters such as the operating mode (eg. 24/7), activity factor, max frequency, temperature range etc. for the target application. Certain Use Conditions may have an effect on the lifetime of the product. For industrial use cases where longer lifetime and higher activity factors may be required, processor manufacturers may recommend to limit the performance of the processing units.
Page 26: High Definition Audio
2.12.1 High Definition Audio Signal Signal Power Remark / PU/PD/SR Description Source / Target Type Level Rail Tolerance eSR = 33 Ω HDA_RST# CMOS 3.3V Sus Reset output to CODEC, active low. AL SOC eSR = 33 Ω HDA_SYNC CMOS 3.3V Sus 48kHz fixed-rate, sample-synchronization signal to the CODEC(s), AL SOC eSR = 33 Ω...
Page 27: Serial Ata
2.12.3 Serial ATA Signal Signal Power Remark / PU/PD/SR Description Source / Target Type Level Rail Tolerance SATA0_TX+ SATA 1.0V AC coupled Serial ATA Channel 0 transmit differential pair AL SOC SATA0_TX- on module 1.0V SATA0_RX+ SATA AC coupled Serial ATA Channel 0 receive differential pair AL SOC SATA0_RX- on module...
Page 28: Express Card Support
2.12.5 Express Card Support Signal Signal Power Remark / PU/PD Description Source / Target Type Level Rail Tolerance ePU = 10 KΩ EXCD[0]_CPPE# CMOS 3.3V 3.3V ExpressCard card request, active low AL SOC ePU = 10 KΩ EXCD[1]_CPPE# CMOS 3.3V 3.3V ExpressCard card request, active low AL SOC...
Page 29 Signal Signal Power Remark / PU/PD/SR Description Source / Target Type Level Rail Tolerance ePU = 4.7 KΩ USB_6_7_OC# CMOS 3.3V Sus 3.3V USB channels 6 and 7 over-current sense. AL SOC A pull-up for this line is present on the module. An open drain driver from a USB current monitor on the Carrier Board may drive this line low.
Page 30: Lpc Bus
2.12.7 LPC Bus Signal Signal Power Remark / PU/PD/SR Description Source / Target Type Level Rail Tolerance LPC_AD[0:3] CMOS 3.3V 3.3V LPC multiplexed address, command and data bus AL SOC LPC_FRAME# CMOS 3.3V LPC frame indicates the start of an LPC cycle AL SOC LPC_DRQ0# CMOS 3.3V...
Page 31: Lvds / Edp
2.12.8 LVDS / eDP Signal Name LVDS Pin Number Signal Name eDP LVDS_A0+ eDP_TX2+ LVDS_A0- eDP_TX2- LVDS_A1+ eDP_TX1+ LVDS_A1- eDP_TX1- LVDS_A2+ eDP_TX0+ LVDS_A2- eDP_TX0- LVDS_A_CK+ eDP_TX3+ LVDS_A_CK- eDP_TX3- LVDS_VDD_EN eDP_VDD_EN LVDS_BKLT_EN eDP_BKLT_EN LVDS_BKLT_CTRL eDP_BKLT_CTRL LVDS_I2C_CK eDP_AUX+ LVDS_I2C_DAT eDP_AUX- RSVD eDP_HPD MSC C6C-AL MSC C6C-AL User Manual 31 / 128...
Page 32 2.12.8.1 LVDS Flat Panel Signal Signal Power Remark / PU/PD/SR Description Source / Target Type Level Rail Tolerance LVDS_A[0:3]+ LVDS LVDS Channel A differential pairs ANX1122 LVDS_A[0:3]- ANX1122 LVDS_A_CK+ LVDS LVDS Channel A differential clock LVDS_A_CK- ANX1122 LVDS_B[0:3]+ LVDS LVDS Channel B differential pairs LVDS_B[0:3]- ANX1122 LVDS_B_CK+...
Page 33: Digital Display Interfaces
Signal Signal Power Remark / PU/PD/SR Description Source / Target Type Level Rail Tolerance AC coupled AL SOC PCIe eDP_AUX+ eDP_AUX+ off module PCIe AC coupled AL SOC eDP_AUX- eDP_AUX- off module AL SOC eDP_HPD CMOS 3.3V 3.3V Detection of Hot Plug / Unplug and notification of the link layer 2.12.9 Digital Display Interfaces 2.12.9.1 Overview Type6 DDI Video Type Mapping Signal...
Page 34 2.12.9.2 DisplayPort Signal Signal Power Remark / PU/PD/SR Description Source / Target Type Level Rail Tolerance AL SOC DP1_LANE[0:3]+ AC coupled DisplayPort Lane [0:3] differential pairs. DP1_LANE[0:3]- off module AL SOC ePD = 100KΩ DP1_AUX+ AC coupled DisplayPort Aux control channel differential pair on module ePU = 100KΩ...
Page 35 Signal Signal Power Remark / PU/PD/SR Description Source / Target Type Level Rail Tolerance AL SOC TMDS1_DATACLK+ TMDS AC coupled HDMI/DVI TMDS Clock differential pairs. TMDS1_DATACLK- off module AL SOC HDMI1_CTRLCLK CMOS 3.3V 3.3V ePD = HDMI/DVI Control Clock. Shared with DP1_AUX+. 100KΩ...
Page 36: Serial Interface Signals
2.12.10 Serial Interface Signals Signal Signal Power Remark / PU/PD/SR Description Source / Type Level Rail Tolerance Target AL SOC SER0_TX CMOS 3.3V 12V, 7mA General purpose serial port transmitter (output) AL SOC ePU = 47 KΩ SER0_RX CMOS 3.3V General purpose serial port receiver (input) AL SOC SER1_TX...
Page 37: Power And System Management
2.12.12 Power and System Management Signal Signal Power Remark / PU/PD/SR Description Source / Target Type Level Rail Tolerance ePU = 10 KΩ PWRBTN# CMOS 3.3V Sus Power button to bring system out of or into Suspend states. Embedded Controller Reset button input.
Page 38 Signal Signal Power Remark / PU/PD/SR Description Source / Target Type Level Rail Tolerance ePU = 10 KΩ THRM# CMOS 3.3V 3.3V Input from off-module temperature sensor indicating an over-temp Embedded situation. Controller ePU = 10 KΩ THRMTRIP# CMOS 3.3V 3.3V Active low output indicating that the CPU has entered thermal Embedded...
Page 39: General Purpose I/O
2.12.13 General Purpose I/O Signal Signal Power Remark / PU/PD/SR Description Source / Target Type Level Rail Tolerance GPI[0:3] CMOS 3.3V 3.3V General purpose input pins. Pulled high internally on the module. AL SOC These signals are multiplexed with SDIO interface. GPO[0:3] CMOS 3.3V 3.3V...
Page 40: Spi Interface
2.12.15 SPI Interface Signal Signal Power Rem. PU/PD/SR Description Source / Type Level Rail / Tol. Target ePU = 47 KΩ SPI_CS# CMOS 1.8V Sus 1.8V Chip select for Carrier Board SPI - may be sourced from chipset SPI0 or SPI1. AL SOC eSR = 22 Ω...
Page 41: Module Type Definition
2.12.16 Module Type Definition Signal Signal Power Remark / PU/PD/SR Description Source / Target Type Level Rail Tolerance TYPE[0:2]# Type 6 module The TYPE pins indicate to the Carrier Board the Pin-out Type that is Carrier board logic implemented on the module. The pins are tied on the module to either ground (GND) or are no-connects (NC).
Page 42: Power And Gnd
2.12.17 Power and GND Signal Signal Power Remark / PU/PD/SR Description Source / Target Type Level Rail Tolerance VCC_12V Power 12V (±5%) Primary power input: +12V (±5%) Voltage Regulators VCC_5V_SBY Power 5V (±5%) Standby power input: +5.0V (±5%) VCC3.3V SUS regulator If VCC5_SBY is used, all available VCC_5V_SBY pins on the connector(s) shall be used.
Page 43 GBE0_MDI1- LPC_DRQ1# USB_SSRX2- USB_SSTX2- GBE0_MDI1+ LPC_CLK USB_SSRX2+ USB_SSTX2+ GND (FIXED) GND (FIXED) GND (FIXED) GND (FIXED) GBE0_MDI0- PWRBTN# USB_SSRX3- USB_SSTX3- GBE0_MDI0+ SMB_CK USB_SSRX3+ USB_SSTX3+ GBE0_CTREF SMB_DAT SUS_S3# SMB_ALERT# DDI1_PAIR6+ DDI1_CTRLCLK_AUX+ SATA0_TX+ SATA1_TX+ DDI1_PAIR6- DDI1_CTRLDATA_AUX- SATA0_TX- SATA1_TX- RSVD RSVD SUS_S4# SUS_STAT# RSVD RSVD SATA0_RX+...
Page 44 AC/HDA_RST# AC/HDA_SDIN0 DDI1_PAIR5- DDI1_PAIR1- GND (FIXED) GND (FIXED) GND (FIXED) GND (FIXED) AC/HDA_BITCLK SPKR DDI2_CTRLCLK_AUX+ DDI1_PAIR2+ AC/HDA_SDOUT I2C_CK DDI2_CTRLDATA_AUX- DDI1_PAIR2- BIOS_DIS0# I2C_DAT DDI2_DDC_AUX_SEL DDI1_DDC_AUX_SEL THRMTRIP# THRM# RSVD RSVD USB6- USB7- DDI3_CTRLCLK_AUX+ DDI1_PAIR3+ USB6+ USB7+ DDI3_CTRLDATA_AUX- DDI1_PAIR3- USB_6_7_OC# USB_4_5_OC# DDI3_DDC_AUX_SEL RSVD USB4- USB5- DDI3_PAIR0+...
Page 45 GND (FIXED) GND (FIXED) GND (FIXED) GND (FIXED) PCIE_TX5+ PCIE_RX5+ PEG_RX0+ PEG_TX0+ PCIE_TX5- PCIE_RX5- PEG_RX0- PEG_TX0- GPI0 GPO1 TYPE0# PEG_LANE_RV# PCIE_TX4+ PCIE_RX4+ PEG_RX1+ PEG_TX1+ PCIE_TX4- PCIE_RX4- PEG_RX1- PEG_TX1- GPO2 TYPE1# TYPE2# PCIE_TX3+ PCIE_RX3+ PEG_RX2+ PEG_TX2+ PCIE_TX3- PCIE_RX3- PEG_RX2- PEG_TX2- GND (FIXED) GND (FIXED) GND (FIXED) GND (FIXED)
Page 46 LVDS_A0- LVDS_B0- PEG_RX6- PEG_TX6- LVDS_A1+ LVDS_B1+ LVDS_A1- LVDS_B1- PEG_RX7+ PEG_TX7+ LVDS_A2+ LVDS_B2+ PEG_RX7- PEG_TX7- LVDS_A2- LVDS_B2- LVDS_VDD_EN LVDS_B3+ RSVD RSVD LVDS_A3+ LVDS_B3- PEG_RX8+ PEG_TX8+ LVDS_A3- LVDS_BKLT_EN PEG_RX8- PEG_TX8- GND (FIXED) GND (FIXED) GND (FIXED) GND (FIXED) LVDS_A_CK+ LVDS_B_CK+ PEG_RX9+ PEG_TX9+ LVDS_A_CK- LVDS_B_CK- PEG_RX9-...
Page 47 GPO0 VGA_HSYNC SPI_CLK VGA_VSYNC PEG_RX13+ PEG_TX13+ SPI_MOSI VGA_I2C_CK PEG_RX13- PEG_TX13- TPM_PP VGA_I2C_DAT TYPE10# SPI_CS# RSVD RSVD SER0_TX RSVD PEG_RX14+ PEG_TX14+ SER0_RX RSVD PEG_RX14- PEG_TX14- A100 GND (FIXED) B100 GND (FIXED) C100 GND (FIXED) D100 GND (FIXED) A101 SER1_TX B101 FAN_PWNOUT C101 PEG_RX15+ D101...
Page 48: Jumpers And Connectors
3 Jumpers and Connectors Jumpers There are two jumpers available on the module: BIOS Default: By shorting the pins of this jumper during boot, the values of the BIOS setup will be reset to default values. BIOS Recovery: By shorting the pins of this jumper during boot the system is forced into crisis recovery mode.
Page 49: Fan Connector
Fan Connector The connector of the fan is located at top side of the CPU module, The pinning is as following (numbering from right to left): directly beneath the CPU: Signal Description The following connector type is used:  JST S4B-PH-SM4-TB V12FAN +12V fan supply voltage.
Page 50: Watchdog
Pin Signal Description Pin Signal Description CAM0_CSI_D3+ MIPI ® -CSI 2.0 D-PHY 1.1 Data Lane 3 CAM0_CSI_D3- MIPI ® -CSI 2.0 D-PHY 1.1 Data Lane 3 CAM1_CSI_CLK+ MIPI ® -CSI 2.0 D-PHY 1.2 Clock Lane CAM1_CSI_CLK- MIPI ® -CSI 2.0 D-PHY 1.2 Clock Lane CAM0_CSI_CLK+ MIPI ®...
Page 51: System Resources
5 System resources PCI IRQ Routing HW-option without PCIe switch (Chipset PCIe lane 2 is connected through PCIe switch to COMExpress connector lanes 2-4):  NOTICE: Chipset PCIe lane 0 is connected to COMExpress connector lane 0. Interrupts of Controller Slot Number PIRQ 0 PIRQ 1...
Page 52: Smb Address Map
SMB Address Map Device Address * ANX1122 50h / 28h ANX1122 8Ch / 46h SO-DIMM 0 SPD EEPROM A0h / 50h SO-DIMM 1 SPD EEPROM A2h / 51h A8h / 54h CMOS Backup EEPROM AAh / 55h Embedded Controller C0h / 60h Pericom PCIe switch DEh / 6Fh *) 8 bit address (with R/W) / 7 bit address (without R/W)
Page 53: Bios
6 BIOS Introduction This guide describes the AMI Aptio Setup Startup screen and contains information on how to access Aptio setup to modify the settings which control AMI pre-OS (operating system) functions. Startup Screen Overview The AMI Aptio Startup screen is a graphical user interface (GUI) that is included in AMI Aptio products. The default bios behavior is to show an informational text screen during bios POST phase, but the graphical boot screen can be enabled in the bios setup.
Page 54 Main Advanced Chipset Security Boot Save & Exit Board Info Trusted Computing Flat Panel Configuration Setup Administrator Boot Configuration Save Options Password Advanced Boot Device Default Options Selection Boot Override Hardware Monitoring ACPI Settings North Bridge User Password Boot Option Priorities System Information SMART Settings South Bridge...
Page 55: Menu Bar
Main Advanced Chipset Security Boot Save & Exit System Component 6.6.1 Menu Bar The Menu Bar at the top of the window lists these selections: Menu Items Description Main Use this menu for basic system information. Use this menu to set the Advanced Features available on your system’s chipset. Advanced Chipset Use this menu to set Chipset Features.
Page 56: Legend Bar
6.6.2 Legend Bar Use the keys listed in the legend bar on the right side of the screen to make your selections, or to exit the current menu. The following table describes the legend keys and their alternates: Function Left and right arrow keys Select Screen Up and down arrow keys Select Item...
Page 57: Main Menu
Main Menu You can make the following selections on the Main Menu itself. Use the sub menus for other selections. Feature Options Description BIOS Information Informative Shows Information BIOS Vendor Informative Shows the Bios Vendor Core Version Informative Shows the Aptio Core Version Compliancy Informative Shows the UEFI Compliance Version...
Page 58: Board Info
6.7.1 Board Info Feature Options Description Manufacturer Informative MSC Technologies GmbH Board Name Informative Shows the board name Board Revision Informative Shows the board revision BIOS Version Informative Shows the bios version Serial Number Informative Shows the boards serial number Boot Counter Informative Shows the amount of boots...
Page 59: Hardware Monitoring
6.7.2 Hardware Monitoring Feature Options Description CPU Temperature Informative Shows CPU temperature Also supported in EAPI Note: CPU temperature is measured close to the CPU and does not reflect CPU die temperature Memory Temperature Informative Shows CPU temperature Board Temperature Informative Shows the board temperature VCore...
Page 60: System Information
6.7.3 System Information Feature Options Description Shows several information e.g TXE Version, GOP Driver Version,… BXT SOC Informative MRC Version PUNIT FW PMC FW TXE FW ISH FW CPU Flavor Memory Information Total Memory Memory Speed Error Correction 6.7.4 Firmware Update Feature Options Description...
Page 61 Feature Options Description Verbose Mode Enabled, Disabled If Enabled, Firmware Update displays some messages on the console Beep Mode Enabled, Disabled If Enabled, Firmware Update is reported by Beep Codes Update Source Local Block Devices, Select Update Sorce Network Network Configuration Submenu Configure the network device for loading the flash image from network...
Page 62: Network Configuration
6.7.5 Network Configuration Feature Options Description 0: Lan 0 ; … Network Device Select the network device for firmware update Local Adress Mode Static, DHCP Select local address mode Static: enter station address, subnetmask and gateway DHCP: get information from DHCP Local IP Adress Local IP Adress Enter local IP address in dotted-decimal notation...
Page 63: Advanced Menu
Feature Options Description Image File Path/Name Image File Path/Name Enter flash image file path. Format path/filename See chapter 6.13 for more information about how to update system bios. Advanced Menu Feature Options Description Trusted Computing Submenu Trusted Computing ( TPM ) ACPI Settings Submenu System ACPI Parameters...
Page 64: Trusted Computing (Tpm)
Feature Options Description Security Configuration Submenu Security Configuration settings (TXE) EC Hardware Monitoring Submenu Fan Configuration settings EC Feature Configuration Submenu EC Feature Configuration Module-specific Initialization Submenu Module-specific Initialization System Component Submenu System Component 6.8.1 Trusted Computing (TPM) Feature Options Description Security Device Support Enable, Disable...
Page 65: Acpi Settings
6.8.2 ACPI Settings Feature Options Description Native PCIE Enable Enabled PCI Express Native Support Enable/Disable. Disabled Hibernation Support Enabled Enables or disables system ability to Hibernate (OS/S4 Sleep Disabled State). This option may not effective with some OS. ACPI Sleep State Suspend Disabled Enables or Disabled System ability to enter S3 state (Suspend).
Page 66: Console Redirection Submenu
Feature Options Description Com 4 and 5 Console Enabled Console Redirection Enable or Disable Redirection Disabled Com 4 and 5 Console Submenu The settings specify how the host computer and the remote Redirection computer (which the user is using) will exchange data. Both computers should have the same or compatible settings.
Page 67 Feature Options Description Stop Bits Stop bits indicate the end of a serial data packet. (A start bit indicates the beginning). The standard setting is 1 stop bit. Communication with slow devices may require more than 1 stop bit. Flow Control None, Hardware RTS/CTS, Flow control can prevent data loss from buffer overflow.
Page 68: Cpu Configuration
6.8.6 CPU Configuration Note: Dependent on used CPU, available setup options may vary!!! Feature Options Description Socket 0 CPU Information Informative See CPU relevant Informations in this submenu CPU Power Management Submenu CPU Power Management options Active Processor Cores Enabled, Disabled Number of cores to enable in each processor package.
Page 69: Cpu Power Management Submenu
6.8.7 CPU Power Management Submenu Feature Options Description EIST Enabled Enable/Disable Intel SpeedStep Disabled  NOTE : If disabled, System runs with nominal clock only. On resume from S3 the clock will be fixed to 800 MHz. Recommendation is not to use S3 if EIST is disabled. Turbo Mode Enabled Enable/Disable Turbo Mode...
Page 70: Ami Graphic Output Protocol Policy
6.8.8 AMI Graphic Output Protocol Policy Feature Options Description Output Select EDP1 (LVDS), DP1, DP2 Select Output Interface  NOTICE: Be sure you have a LVDS connected if you switch to LVDS output because the output change is instantly. If you need to do a blind reset of the output you have to press Enter again, then Up or Down, then Enter.
Page 71: Network Stack Configuration
6.8.10 Network Stack Configuration Feature Options Description Network Stack Enabled, Disabled Enable/Disable UEFI Network Stack IPv4 PXE Support Enabled, Disabled Enable Ipv4 PXE Boot Support. If disabled IPV4 PXE boot option will not be created Ipv4 HTTP Support Enabled, Disabled Enable Ipv4 HTTP Boot Support.
Page 72: Nvme Configuration
Feature Options Description Interrupt 19 Response Immediate Bios reaction on INT19 trapping by Option Rom: Immediate – execute the trap right now Postponed Postponed – execute the trap during legacy boot Boot option filter UEFI and Legacy This option controls what devices system can boot to. Legacy only UEFI only Network...
Page 73: Sdio Configuration
6.8.13 SDIO Configuration Feature Options Description SDIO Device ( eMMC, SD Informative Shows the SDIO device found Card ) SDIO Access Mode Auto, ADMA, SDMA, PIO Auto Option: Access SD device in DMA mode if controller supports it,otherwise in PIO mode.DMA Option: Access SD device in DMA mode.PIO Option: Access SD device in PIO mode.
Page 74: Usb Configuration
6.8.14 USB Configuration Feature Options Description Legacy USB support Auto Enables Legacy USB support. Enabled AUTO option disables legacy support if no USB devices are Disabled connected. DISABLE option will keep USB devices available only for EFI applications. XHCI Hand-off Enabled This is a workaround for OSes without XHCI hand-off support.
Page 75: Security Configuration
6.8.15 Security Configuration Feature Options Description TXE HMRFPO Enabled Enable or disable TXE Host ME Region Flash Protection Override Disabled TXE EOP Message Enabled Send EOP message before enter OS Disabled 6.8.16 SIO WB627/ SMSC 3114 Configuration Feature Options Description WB627 COM A-B: Enabled Enable or disable COM A-B on Winbond SIO...
Page 76 Feature Options Description LPT Mode: Mode setting for LPT on Winbond SIO EPP 1.9 ECP + EPP 1.9 Printer Mode EPP 1.7 ECP+EPP 1.7 WB627 PS/2 Controller Disabled Enable or disable the WB627 PS/2 controller. Enabled WB627 HWM Interface Disabled, Enabled Enable or disable the hardware monitoring interface.
Page 77: Ec Hardware Monitoring
6.8.17 EC Hardware Monitoring Feature Options Description CPU Fan Control Manual, Temperature based Define how the fan should be controlled: manually set to a fixed duty cycle, or temperature based auto control. Fan Speed Off, 25%, 50%, 75%, 100% Setup the fan duty cycle for manual fan control. By CPU sensor Enabled, Disabled If enabled, the cpu fan will be controlled by this temperature sensor.
Page 78 Feature Options Description By Memory sensor Enabled, Disabled If enabled, the CPU throttling can be triggered by this temperature sensor. CPU/Memory/Board 20, 25, 30, 35, 40, 45, 50, 55, Temperature threshold (in degrees Celsius) at which the fan should Temperature Limit T1 [°C] 60 °C be set to maximum speed duty cycle.
Page 79 Detail explanation how fan control is working: Detail explanation how fan control is working: Up to 2 Fans are supported, either by manual mode with fixed duty cycles or by temperature based mode with dynamic duty cycles. The CPU fan is typically associated with the onboard CPU temperature sensor for automatic temperature control.
Page 80 PWM min Fan running with minimum speed (typically 25%) PWM mid Fan running with medium speed (typically 50%) PWM max Fan running with maximum speed (typically 100%) Temperature zone T<T1, Fan stopped Temperature zone T1<T<T2, Fan running with minimum speed Temperature zone T2<T<T3, Fan running with medium speed Temperature zone T2<T<T3, Fan running with maximum...
Page 81 Different temperature profiles for any temperature sensor can be selected in BIOS SETUP. If more than one temperature sensor is selected for fan control, the higher temperature exceeding the selected temperature limit (T1, T2, T3) gets precedence for fan regulation. MSC C6C-AL MSC C6C-AL User Manual 81 / 128...
Page 82: Ec Features Configuration
6.8.18 EC Features Configuration Feature Options Description Watchdog start on Boot Start the watchdog after BIOS POST if enabled Startup Delay Select the initial delay value. This is an additional one-time delay before the standard timeout timer is started. 1min 5min Event timeout Select the timeout value after which the watchdog will perform its...
Page 83: Module-Specific Initialization
6.8.19 Module-specific Initialization Feature Options Description LAN Controller Enabled,Disabled Enable or disable Lan controller ANX Controller Enabled,Disabled Enable or disable LVDS aNX1122 chip PCIe-Switch Power-Save Enabled,Disabled Enable/Disable power-save mode of Pericom PCIe switch. If Mode Enabled, unused ports behind Pericom PCIe switch will be turned off to save power.
Page 84: Onboard Gpio Configuration
6.8.20 Onboard GPIO configuration Feature Options Description GPIO Configuration 0-3 Input GPIO Configuration Output Input & Output GPIO 0-3 Input Configuration Rising Edge Define the condition under which an interrupt is generated (Interrupt Capabilities) Falling Edge Both Edge GPIO 0-7 Output Output Low Define the default value for this GPIO.
Page 85: Chipset
Feature Options Description HighSpeed SerialIO SSC -0,1% - -0,5% ; 0%(No SCC) Choose the item in SSC selection table for HighSpeed SerialIO Selection Table spread spectrum Chipset Feature Options Description Flat Panel Configuration Submenu Flat Panel Configuration North Bridge Submenu North Bridge Settings South Bridge Submenu...
Page 86: Flat Panel Configuration
6.9.1 Flat Panel Configuration Feature Options Description LVDS Panel Type 640x480 Select panel type. Only possible if external Eeprom is not 800x480 connected or no EDID data found in non-volatile BIOS NVRAM. 800x600 1024x768 1280x720 1280x800 1280x1024 1366x768 1440x900 1600x900 1920x1080 1920x1200 LVDS Mapping...
Page 87: North Bridge
Feature Options Description PWM Control EC, Chipset EC means PWM will be controlled by the board controller. Chipset means PWM will be controlled by videobios. PWM Polarity Active Low, Active High Backlight PWM signal polarity PWM Brightness 0-100% Select the initial brightness value of the flat panel PWM Frequency 200HZ, 1KHz, 10KHz, Select backlight PWM frequency for brightness control...
Page 88: South Bridge
6.9.4 South Bridge Feature Options Description LPC Interface Configuration Enabled, Disabled Enable LPC interface, or disable it by setting all signals to GPIO mode. In GPIO mode, all pins will be inputs. LPC CLKRUN# support Enabled, Disabled Enable LPC clockrun. If enabled, serial IRQ must be set to quiet mode.
Page 89: South Cluster Configuration
Feature Options Description S0ix is enabled. This item will be read only if S0ix is enabled GTT Size 2MB, 4MB, 8MB Select the GTT Size Aperture Size 128 MB, 256MB, 512 MB Select the Aperture Size DVMT Pre-Allocated 64MB-512MB Select DVMT 5.0 Pre-Allocated (Fixed) Graphics Memory size used by the Internal Graphics Device DVMT Total Gfx Mem 128, 256, Max...
Page 90: Hd Audio Configuration
Feature Options Description SATA Drives Submenu SATA Drives SCC Configuration Submenu SCC Configuration Settings USB Configuration Submenu USB Configuration Miscellaneous Configuration Submenu Enable/Disable Misc. Features 6.9.7 HD Audio Configuration Feature Options Description HD-Audio Support Enabled Control Detection of the Azalia device. Disabled Disabled = Azalia will be unconditionally disabled Enabled = Azalia will be unconditionally Enabled...
Page 91: Lpss Configuration
6.9.8 LPSS Configuration Feature Options Description CAM1 I2C Controller Disabled Enable/Disable the CAM1 I2C Controller PCI Mode Set CAM1 I2C Speed Standard Mode Select CAM1 I2C Speed Fast Mode Fast Plus Mode High Speed Mode CAM0 I2C Controller Disabled Enable/Disable the CAM0 I2C Controller PCI Mode Set CAM0 I2C Speed Standard Mode...
Page 92: Pci Express Configuration
6.9.9 PCI Express Configuration Feature Options Description PCI Express Clock Gating Enabled, Disabled, Auto Control the PCI Express Root Port. Auto: To disable unused root por automatically for most optimum power savings. Port8xh Decode Port Enabled, Disabled Select which PCI Express Root Port should claim accesses to I/O port 8xh Peer Memory Write Enable Enabled, Disabled...
Page 93 Feature Options Description Enabled PCI Express Device Fatal Error Reporting Enable/Disable. Disabled NFER Enabled PCI Express Device Non-Fatal Error Reporting Enable/Disable. Disabled Enabled PCI Express Device Correctable Error Reporting Enable/Disable Disabled Default Setting PCI Express Completion Timer TO Enable/Disable. 16-55 ms 65-210 ms 260-900 ms 1-3.5 s...
Page 94 Feature Options Description Non Snoop Latency Override Disabled Non Snoop Latency Override for PCH PCIE. Disabled: Disable override. Manual: Manually enter override values. Auto (default): Manual Maintain default BIOS flow. Auto PCIE LTR Lock Enabled PCIE LTR Configuration Lock Disabled PCIe Selectable De- Enabled When the Link is operating at 5.0 GT/s speed, this bit selects the...
Page 95: Sata Drives
6.9.11 SATA Drives Feature Options Description Chipset SATA Enable, Disable Enables or Disables the Chipset SATA Controller. The Chipset SATA controller supports 2 SATA ports (up to 6Gb/s supported per port) SATA Controller Speed Default, Gen1-3 Limit the maximum speed of the SATA controller SATA Test Mode Enable, Disable Test Mode Enable/Disable...
Page 96: Usb Configuration
Feature Options Description SCC eMMC Support Enable, Disable Enable/Disable SCC eMMC Support (D28:F0) eMMC Max Speed DDR50, HS200, HS400 Select the eMMC max Speed allowed. 6.9.13 USB Configuration Feature Options Description XHCI Pre-Boot Driver Enabled Enable/Disable XHCI Pre-Boot Driver support. Disabled USB Port 0-7 Enabled...
Page 97 Feature Options Description Board Clock Spread Enabled Enable Clock Chip's Spread Spectrum feature Spectrum Disabled Wake On Lan Enabled Enable or Disable the Wake on Lan Disabled BIOS Lock Enabled Enable/Disable the SC BIOS Lock Enable feature. Required to be Disabled enabled to ensure SMM protection of flash.
Page 98: Security
6.10 Security Feature Options Description Administrator Password Set Password Set Setup Administrator Password User Password Set Password Set User Password HDDSecurity Configuration Set Password Set HDD Password Secure Boot Submenu Enter Secure Boot Menu Note: If ONLY the Administrator's password is set, then this only limits access to Setup and is only prompted for when entering Setup. If ONLY the User's password is set, then this is a power on password and must be entered to boot or enter Setup.
Page 99: Key Management
Feature Options Description Key Management Submenu Enables expert users to modify Secure Boot Policy variables without full authentication 6.10.2 Key Management Feature Options Description Factory Key Provision Enabled, Disabled Provision factory default keys on next re-boot only when System in Setup Mode Restore Factory Keys Restore Factory Default...
Page 100 Feature Options Description Key Exchange Keys Update Enroll Factory Default or load certificates from a file: Append 1. Public Key Certificate in: a) EFI_SIGNATURE_LIST b) EFI_CERT_X509 (DER encoded) c) EFI_CERT_RSA2048 (bin) d) EFI_CERT_SHA256, 385, 512 2. Authenticated UEFI Variable 3. EFI PE/COFF Image (SHA256) Key Source: Factory, External, Mixed Authorized Signatures...
Page 101 Feature Options Description Authorized TimeStamps Update Enroll Factory Default or load certificates from a file: Append 1. Public Key Certificate in: a) EFI_SIGNATURE_LIST b) EFI_CERT_X509 (DER encoded) c) EFI_CERT_RSA2048 (bin) d) EFI_CERT_SHA256, 385, 512 2. Authenticated UEFI Variable 3. EFI PE/COFF Image (SHA256) Key Source: Factory, External, Mixed OsRecovery Signatures...
Page 102: Boot
6.11 Boot Feature Options Description Setup Prompt Timeout 1-65535sec Number of seconds to wait for setup activation key. 65535(0xFFFF) means wait forever. Bootup NumLock State Select the keyboard NumLock state Quiet Boot Enabled Enables/Disables Quiet Boot option Disabled Boot Priority 1 SATA Port 0/1, USB 2.0 Port Define which boot device should have the highest boot priority 0-7, USB 3.0 Port 0-3, SD...
Page 103 Feature Options Description Boot option filter UEFI and Legacy, Legacy This option controls Legacy/UEFI ROMs priority. If set to Legacy only, UEFI only only, then no UEFI Device will be bootable. If set to UEFI only, UEFI devices will be bootable. ...
Page 104: Save & Exit
Feature Options Description USB Support Disabled, Full Initial, Partial If Disabled, all USB devices will NOT be available until after OS Initial boot. If Partial Initial, USB Mass Storage and specific USB port/device will NOT be available before OS boot. If Full Initial, all USB devices will be available in OS and Post.
Page 105 Save Changes and Reset When you have completed the system configuration changes, select this option to save the changes and reboot the system, so the new system configuration parameters can take effect. Discard Changes and Reset Select this option to quit Aptio™ TSE without making any modifications to the system configuration Save Changes Selecting “Save Options”...
Page 106 Launch EFI Shell from filesystem device Attempts to Launch EFI Shell application (Shellx64.efi) from one of the available filesystem devices. WARNING! This function will still work even if mass storage devices are not registered into the boot device list via MSC BIOS Configuration tool MBconf tool.
Page 107: Setup Controlled Update
Bios and Firmware Update 6.13 Setup Controlled Update Within BIOS Setup main menu a submenu “MSC Firmware Update” is integrated to define settings for BIOS updates and initially trigger the update Control flags define the section of FLASH which needs to be updated (BIOS only, complete FLASH, partial BIOS sections, etc.) and other options like screen output, preserving DMI data, etc.
Page 108 It is also possible to initiate the network update with AutoFlash from EFI, Windows or Linux by adding a config file with all network parameters. Here is an example of a simple .txt file which contains the network configuration data, ts is loaded by Autflash with the switches : -net –nc [Filename] e.g AutoFlash.efi –u –e –net –fc configfile.txt Network Interface : 0 Config Mode...
Page 109: Bios Update From Efi Shell
6.14 Bios Update from EFI Shell BIOS Update - Batch Mode 1. Create an EFI shell bootable USB stick by copying the shell binary to target directory \EFI\boot\bootx64.efi 2. Copy the update file to \Recovery\FlashImg.bin 3. Copy the update script to root directory (if required add -e to AutoFLASH.efi commandline) 4.
Page 110: Blind Restoration Of Bios Default Settings (No Display Available)
6.17 Blind Restoration of Bios default settings (no display available) 1. Power up the System [DEL] 2. Repeatedly press for several seconds [F3] [F2] 3. Press for default settings or for previous values. 4. Press [Enter] [F4] 5. Press [Enter] 6.
Page 111: Trusted Update
6.19 Trusted Update General Information The Trusted Update feature is a combination of bios-based features and external tools which provides security for the bios update process. The aim is to secure the bios against attacks that try to change the bios flash content, while still allowing trusted parties to update the bios. The following items are part of Trusted Update: Flash write-protection The bios will write-protect its own flash to prevent malicious applications from changing the bios code.
Page 112 Availability of easy to use tools Bios images can still be edited with the MSC bios editor, as the editor will automatically ensure that your bios checksum is updated. If customer keys are provided, the bios editor will be able to patch the public key into the bios and create a signature for the image. Required Tools for configuring Trusted Update: MSC Bios Editor (version V2.30 or later) One of the following for creating the required keys:...
Page 113 Key Creation with MakeCert MakeCert -r -a sha256 -len 2048 -n "CN=<certificate name>" -sv key.pvk key.cer pvk2pfx -pvk key.pvk -spc key.cer -pfx key.pfx -pi <password> Since Trusted Update uses the same format as the Microsoft tools, those files can be used directly. The important files are the private key file “key.pfx”...
Page 114 MSC Bios Editor Usage Standard usage for creating a bios image with active signature verification: Open up the bios editor and load your bios image file. Click on the “Trusted Update” tab. If there is no “Trusted Update” tab, the currently loaded bios image does not support Trusted Update yet. Use the public key certificate “Add…”...
Page 115: Jumpers
BIOS Recovery: By shorting the pins of this jumper during boot the system is forced into crisis recovery mode. For more information see chapter 6.21 Post Codes For Post Code information please look on the MSC Technologies Support Website or contact Avnet Integrated / MSC Technical Support: Email: support@msc-technologies.eu Phone: +49 8165 906-200...
Page 116: Technotes
7 Technotes ® EIST (Enhanced Intel Speed Step) This allows the processor to meet the instantaneous performance needs of the operation being performed, while minimizing power draw and heat dissipation. Processor clock will be at its minimum possible frequency when in IDLE. When performing CPU loads, it will change its frequency up to its maximum frequency.
Page 117 ® Intel VT and VT-d ® Increasing manageability, security, and flexibility in IT environments, virtualization technologies like hardware-assisted Intel ® Virtualization Technology (Intel VT) combined with software-based virtualization solutions provide maximum system utilization by consolidating multiple environments into a single server or PC. By abstracting the software away from the underlying hardware, a world of new usage models opens up that reduce costs, increase management efficiency, strengthen security, while making your computing infrastructure more resilient in the event of a disaster.
Page 118: Eapi
"Binding" encrypts data using the TPM endorsement key, a unique RSA key burned into the chip during its production, or another trusted key descended from it. "Sealing" encrypts data in similar manner to binding, but in addition specifies a state in which the TPM must be in order for the data to be decrypted (unsealed).
Page 119: Troubleshooting
If Windows Installation setup does not allow to install on harddisk try to make harddisk the first boot device in Bios setup. Issue 5: Legacy Boot Devices Because CSM is disabled, only devices with UEFI OS will appear as boot device For additional help please contact Avnet Integrated / MSC Technical Support: Phone: +49 - 8165 906 - 200 Email: support@msc-technologies.eu...
Page 120 LICENSE ISSUES OPenSSL ====================== The OpenSSL toolkit stays under a dual license, i.e. both the conditions of the OpenSSL License and the original SSLeay license apply to the toolkit. See below for the actual license texts. Actually both licenses are BSD-style Open Source licenses.
Page 121 the documentation and/or other materials provided with the distribution. * 3. All advertising materials mentioning features or use of this software must display the following acknowledgment: "This product includes software developed by the OpenSSL Project for use in the OpenSSL Toolkit. (http://www.openssl.org/)" * 4.
Page 122 * ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED * OF THE POSSIBILITY OF SUCH DAMAGE.
Page 123 * This library is free for commercial and non-commercial use as long as * the following conditions are aheared to. The following conditions * apply to all code found in this distribution, be it the RC4, RSA, * lhash, DES, etc., code; not just the SSL code. The SSL documentation * included with this distribution is covered by the same copyright terms * except that the holder is Tim Hudson (tjh@cryptsoft.com).
Page 124 The word 'cryptographic' can be left out if the rouines from the library being used are not cryptographic related :-). * 4. If you include any Windows specific code (or a derivative thereof) from the apps directory (application code) you must include an acknowledgement: "This product includes software written by Tim Hudson (tjh@cryptsoft.com)"...
Page 125 WPA Supplicant License ====================================================================== Copyright (c) 2003-2009, Jouni Malinen <j@w1.fi> and contributors All Rights Reserved. ====================================================================== License -------- This software may be distributed, used, and modified under the terms of BSD license: Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met: 1.
Page 126 names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission. ============== THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
Page 127 - bignum - minimal size (ca. 50 kB binary, parts of which are already needed for WPA; TLSv1/X.509/ASN.1/RSA/bignum parts are about 25 kB on x86) Requirements ------------ wpa_supplicant was designed to be portable for different drivers and operating systems. Hopefully, support for more wlan cards and OSes will be added in the future.
Page 128 completed its work in May 2004. The IEEE 802.11i amendment to the IEEE 802.11 standard was approved in June 2004 and published in July 2004. Wi-Fi Alliance (http://www.wi-fi.org/) used a draft version of the IEEE 802.11i work (draft 3.0) to define a subset of the security enhancements that can be implemented with existing wlan hardware.

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