Related Manuals for Avnet COM Express MSC C10M-BT
Summary of Contents for Avnet COM Express MSC C10M-BT
- Page 1 User Manual COM Express Mini Module MSC C10M-BT / MSC C10M-BTC Type 10 Pin-out ® Intel AtomTM Series SOC Rev. 1.0 2021-03-08...
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Page 2: Copyright Notice
If the information provided there does not solve your problem, please contact our Avnet Integrated / MSC Technical Support: Email: support@msc-technologies.eu Phone: +49 8165 906-200... -
Page 3: Table Of Contents
MSC C10M-BT / MSC C10M-BTC User Manual CONTENT Copyright Notice ............................. 2 Important Information ..........................2 Disclaimer ..............................2 EMC Rules ............................... 2 Trademarks .............................. 2 Certification ............................. 2 Life-Cycle-Management .......................... 2 Product Support ............................2 General Information..........................6 Revision History ..........................6 Introduction ............................ - Page 4 MSC C10M-BT / MSC C10M-BTC User Manual Fan Connector ..........................35 Watchdog ............................37 System resources ..........................38 PCI IRQ Routing .......................... 38 IRQ Lines in APIC Mode ......................40 SMB Address Map ........................40 BIOS ..............................41 Introduction ..........................41 Startup Screen Overview ......................
- Page 5 MSC C10M-BT / MSC C10M-BTC User Manual Blind Restoration of Bios default settings (no display available) ..........76 Bios Recovery ..........................77 Bios Recovery (for BIOS version older than V1.50 ) ..............77 Clear CMOS and Recovery Jumper .................... 78 Post Codes ...........................
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Page 6: General Information
MSC C10M-BT / MSC C10M-BTC User Manual General Information Revision History Rev. Date Description 2021-03-08 First Release 6 / 90... - Page 7 MSC C10M-BT / MSC C10M-BTC User Manual Reference Documents COM Express Module Base Specification COM Express Revision 2.1 Last update: April 10 , 2012 PCI Local Bus Specification Rev. 2.1 PCI21.PDF Last update: June 1 , 1995 http://www.pcisig.com Serial ATA Specification Serial ATA 1.0 gold.pdf Last update: August 29 , 2002 Rev.1.0...
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Page 8: Introduction
MSC C10M-BT / MSC C10M-BTC User Manual Introduction COM Express™ is an open specification from PICMG (PCI Industrial Computer Manufacturer Group). It is a module concept to bring PCI Express and other newer technologies like SATA, USB 3.0 and different display interfaces onto a COM (Computer On Module). A COM Express™... -
Page 9: Technical Description
MSC C10M-BT / MSC C10M-BTC User Manual Technical Description Key features The MSC C10M-BT COM Express module is designed as a type 10 module according to COM Express® Module Base Specification Revision 2.1. Key features include: Module size: 84 mm x 55 mm ... -
Page 10: Block Diagram
MSC C10M-BT / MSC C10M-BTC User Manual Block diagram 10 / 90... - Page 11 MSC C10M-BT / MSC C10M-BTC User Manual 11 / 90...
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Page 12: Com Express Implementation
MSC C10M-BT / MSC C10M-BTC User Manual COM Express implementation COM Express™ required and optional features for pin-out type 10 are summarized in the following table. The features identified as Minimum (Min.) shall be implemented by all modules. Features identified up to Maximum (Max) may be additionally implemented by a module. The column MSC C10M-BT / BTC shows the features implemented by the MSC module. - Page 13 MSC C10M-BT / MSC C10M-BTC User Manual A-B Trusted Platform Modules 0 / 1 1 / 1 optional TPM 1.2 module 13 / 90...
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Page 14: Functional Units
MSC C10M-BT / MSC C10M-BTC User Manual Functional units CPUs Intel® Atom E3815, SC, 1.46GHz, 512 KB L2 Cache, 5W, 1ch DDR3L. (FCBGA 1170 Intel® Atom E3825, DC, 1.33GHz, 1 MB L2 Cache, 6W, 1ch DDR3L. package) Intel® Atom E3826, DC, 1.45GHz, 1 MB L2 Cache, 7W, 2ch DDR3L. Intel®... -
Page 15: Power Supply
MSC C10M-BT / MSC C10M-BTC User Manual Power Supply +12V primary power supply input +5V standby Option, is not required for module operation. If not present, customer must ensure that the supply voltages which are generated on the carrier board are switched off during suspend states, so that no current from the carrier board’s signal lines can flow to the CPU board. -
Page 16: System Memory
MSC C10M-BT / MSC C10M-BTC User Manual 3. System is shut down into “Suspend to RAM” (S3) by Windows 7 Professional 64-bit SP1. 4. System is shut down into “Suspend to RAM” (S3) by Windows 7 Professional 64-bit SP1 with Wake On LAN enabled. S4 / S5 Input Power Module / CPU... -
Page 17: Mechanical Dimensions
MSC C10M-BT / MSC C10M-BTC User Manual Temperature Grade Technology Memory Size Chip Identification Industrial (-40°C to +85°C) 4 GByte Micron MTFC4GACAJCN-4M IT Industrial (-40°C to +85°C) 8 GByte Micron MTFC8GAKAJCN-4M IT Micron MTFC16GAKAECN-4M IT Industrial (-40°C to +85°C) 16 GByte Micron MTFC16GAKAEJP-4M IT Micron MTFC32GJDED-4M IT Industrial (-40°C to +85°C) -
Page 18: Thermal Specifications
MSC C10M-BT / MSC C10M-BTC User Manual Thermal Specifications The cooling solution of a COM Express module is based on a heat-spreader concept. A heat-spreader is a metal plate (typically aluminium) mounted on the top of the module. The connection between this plate and the module components is typically done by thermal interface materials like phase change foils, gap pads and copper or aluminium blocks. -
Page 19: Use Conditions
Certain Use Conditions may have an effect on the lifetime of the product. Please consult Avnet Integrated / MSC Technical Support if there are questions concerning specific Use Conditions when using the selected MSC module for the target application. -
Page 20: Ethernet
MSC C10M-BT / MSC C10M-BTC User Manual HDA_SDIN[0:1] CMOS 3.3V Sus 3.3V Serial TDM data inputs from up to 2 CODECs. BT SOC Note: Do not use a multiplexer or any other signal switcher with the HDA Interface on the carrier. 2.12.2 Ethernet Signal... -
Page 21: Pci Express Lanes
MSC C10M-BT / MSC C10M-BTC User Manual 2.12.4 PCI Express Lanes Signal Signal Power Remark / PU/PD/SR Description Source / Target Type Level Rail Tolerance PCIE_TX[0:2]+ PCIe 1.0V AC coupled PCI Express Differential Transmit Pairs 0 through 2 BT SOC PCIE_TX[0:2]- on module PCIE_RX[0:2]+... -
Page 22: Usb
MSC C10M-BT / MSC C10M-BTC User Manual 2.12.6 Signal Signal Power Remark / PU/PD/SR Description Source / Target Type Level Rail Tolerance USB[0:3]+ 3.3V Sus 3.3V USB differential pairs, channels 0 through 3 BT SOC USB[0:3]- USB[4:7]+ 3.3V Sus 3.3V USB differential pairs, channels 4 through 7 USB HUB USB[4:7]-... -
Page 23: Lpc Bus
MSC C10M-BT / MSC C10M-BTC User Manual 2.12.7 LPC Bus Signal Signal Power Rail Remark / PU/PD/SR Description Source / Target Type Level Tolerance LPC_AD[0:3] CMOS 3.3V 3.3V LPC multiplexed address, command and data bus BT SOC LPC_FRAME# CMOS 3.3V LPC frame indicates the start of an LPC cycle BT SOC LPC_DRQ0#... - Page 24 MSC C10M-BT / MSC C10M-BTC User Manual LVDS Flat Panel 2.12.8.1 Signal Signal Power Remark / PU/PD/SR Description Source / Target Type Level Rail Tolerance LVDS_A[0:3]+ LVDS LVDS Channel A differential pairs ANX1122 LVDS_A[0:3]- ePD = 100 KΩ LVDS_A_CK+ LVDS LVDS Channel A differential clock ANX1122 ePU = 100 KΩ...
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Page 25: Digital Display Interfaces
MSC C10M-BT / MSC C10M-BTC User Manual 2.12.9 Digital Display Interfaces Overview Type10 DDI Video Type Mapping 2.12.9.1 Signal HDMI/DVI (TMDS Signaling) DDI0_PAIR0+/- DP0_LANE0+/- TMDS0_DATA2+/- DDI0_PAIR1+/- DP0_LANE1+/- TMDS0_DATA1+/- DDI0_PAIR2+/- DP0_LANE2+/- TMDS0_DATA0+/- DDI0 DDI0_PAIR3+/- DP0_LANE3+/- TMDS0_DATACLK+/- DDI0_HPD DP0_HPD HDMI0_HPD DDI0_CTRLCLK/DATA_AUX+/- DP0_AUX+/- HDMI0_CTRLCLK/DATA DDI0_DDC_AUX_SEL DisplayPort... -
Page 26: Miscellaneous
MSC C10M-BT / MSC C10M-BTC User Manual Signal Signal Power Remark / PU/PD/SR Description Source / Target Type Level Rail Tolerance ePD = 1MΩ DDI0_DDC_AUX_SEL I CMOS 3.3V 3.3V Pull to 3.3V on the Carrier with 100k Ohm resistor to configure the DDI0_AUX pair as the DDC channel. - Page 27 MSC C10M-BT / MSC C10M-BTC User Manual Signal Signal Power Remark / PU/PD/SR Description Source / Target Type Level Rail Tolerance PWR_OK CMOS 3.3V Sus 12V ePU = 22 KΩ Power OK from main power supply. A high value indicates that the Embedded power is good.
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Page 28: General Purpose I/O
MSC C10M-BT / MSC C10M-BTC User Manual 2.12.12 General Purpose I/O Signal Signal Power Remark / PU/PD/SR Description Source / Type Level Rail Tolerance Target GPI[0:3] CMOS 3.3V 3.3V General purpose input pins. Pulled high internally on the module. BT SOC, These signals are multiplexed with SDIO interface. -
Page 29: Sdio
MSC C10M-BT / MSC C10M-BTC User Manual 2.12.13 SDIO Signal Signal Power Remark / PU/PD/SR Description Source / Type Level Rail Tolerance Target CMOS 1.8V/3.3V 1.8V / 3.3V iPU = 20 KΩ SDIO_CD# SDIO Card Detect. This signal indicates when a SDIO/MMC card is BT SOC ( GPO3 ) present. -
Page 30: Spi Interface
MSC C10M-BT / MSC C10M-BTC User Manual 2.12.14 SPI Interface Signal Signal Power Rem. PU/PD/SR Description Source / Type Level Rail / Tol. Target ePU > 10 KΩ SPI_CS# CMOS 1.8V Sus 1.8V Chip select for Carrier Board SPI - may be sourced from chipset SPI0 or SPI1. BT SOC eSR = 15 Ω... -
Page 31: Module Type Definition
MSC C10M-BT / MSC C10M-BTC User Manual 2.12.16 Module Type Definition Signal Signal Power Remark / PU/PD/SR Description Source / Target Type Level Rail Tolerance TYPE10# 47k pull ePD = 47 Dual use pin. Indicates to the Carrier Board that a Type 10 Module is Carrier board logic KΩ... -
Page 32: Pin List For Msc C10M-Bt / Btc Module (Type 10)
MSC C10M-BT / MSC C10M-BTC User Manual Pin List for MSC C10M-BT / BTC module (Type MSC C10M-BT MSC C10M-BT MSC C10M-BTC MSC C10M-BTC GND (FIXED) GND (FIXED) GND (FIXED) GND (FIXED) GBE0_MDI3- GBE0_ACT# GBE0_MDI3- GBE0_ACT# GBE0_MDI3+ LPC_FRAME# GBE0_MDI3+ LPC_FRAME# GBE0_LINK100# LPC_AD0 GBE0_LINK100#... - Page 33 MSC C10M-BT / MSC C10M-BTC User Manual PCIE_TX1+ PCIE_RX1+ PCIE_TX1+ PCIE_RX1+ 33 / 90...
- Page 34 MSC C10M-BT / MSC C10M-BTC User Manual MSC C10M-BTC MSC C10M-BT MSC C10M-BT MSC C10M-BTC PCIE_TX1- PCIE_RX1- PCIE_TX1- PCIE_RX1- WAKE0# WAKE0# GPI2 WAKE1# GPI2 WAKE1# PCIE_TX0+ PCIE_RX0+ PCIE_TX0+ PCIE_RX0+ PCIE_TX0- PCIE_RX0- PCIE_TX0- PCIE_RX0- GND (FIXED) GND (FIXED) GND (FIXED) GND (FIXED) LVDS_A0+ DDI0_PAIR0+ LVDS_A0+...
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Page 35: Jumpers And Connectors
MSC C10M-BT / MSC C10M-BTC User Manual Jumpers and Connectors Jumpers There are three jumpers available on the module: RTC Reset: By shorting the pins of this jumper, the RTC Clock is reset and the values of the CMOS NV-RAM are cleared. This jumper is only functional in systems with battery at RTC power supply. - Page 36 MSC C10M-BT / MSC C10M-BTC User Manual TACHO Input for the tacho signal from the fan (open collector); two pulses / rotation PWM output signal for fan speed control. 36 / 90...
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Page 37: Watchdog
MSC C10M-BT / MSC C10M-BTC User Manual Watchdog The C10M-BT board has a watchdog function implemented by an embedded controller. The watchdog can be enabled and configured in the BIOS Setup. If the watchdog is enabled a counter is started which generates a reset if it is not retriggered within a programmable time window. -
Page 38: System Resources
MSC C10M-BT / MSC C10M-BTC User Manual System resources PCI IRQ Routing Interrupts of Controller Slot Number IDSEL # (or Onboard Device) DEV/Fu nction Internal Graphic Device Dev 2h, Func 0h SDIO Port (not used) Dev 11h Func 0h SD-Card Dev 12h Func 0h SATA... - Page 39 MSC C10M-BT / MSC C10M-BTC User Manual Chipset PCIe lane 0 is connected to COMExpress connector lane 0. Chipset PCIe lane 1 is connected to COMExpress lane 1 and so on. Note: PCIe lane 3 is used for internal LAN device. 39 / 90...
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Page 40: Irq Lines In Apic Mode
MSC C10M-BT / MSC C10M-BTC User Manual IRQ Lines in APIC Mode IRQ# Available Typical Interrupt Connected to Pin Source Counter 0 Keyboard Cascade Interrupt from Slave PIC Not available for PCIe devices Not available for PCIe devices shared SCI Math processor PIRQA PIRQB... -
Page 41: Bios
MSC C10M-BT / MSC C10M-BTC User Manual BIOS Introduction This guide describes the AMI Aptio Setup Startup screen and contains information on how to access Aptio setup to modify the settings which control AMI pre-OS (operating system) functions. Startup Screen Overview The AMI Aptio Startup screen is a graphical user interface (GUI) that is included in AMI Aptio products. - Page 42 MSC C10M-BT / MSC C10M-BTC User Manual The BIOS Menu Structure The BIOS Menu is structured in the following way: Main MSC Board Info Hardware Monitoring Measurement Firmware Update Advanced Trusted Computing ACPI Settings Serial Port Console Redirection CPU Configuration PPM Configuration IDE Configuration Internal Devices Configuration...
- Page 43 MSC C10M-BT / MSC C10M-BTC User Manual The Menu Bar The Menu Bar at the top of the window lists these selections: Menu Items Description Main Use this menu for basic system information. Advanced Use this menu to set the Advanced Features available on your system’s chipset.
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Page 44: The Main Menu
MSC C10M-BT / MSC C10M-BTC User Manual Display a submenu To display a submenu, use the arrow keys to move the cursor to the sub menu you want. Then press Enter. A pointer marks all submenus. The Main Menu You can make the following selections on the Main Menu itself. Use the sub menus for other selections. -
Page 45: Msc Board Info
MSC C10M-BT / MSC C10M-BTC User Manual 6.6.1 MSC Board Info Feature Options Description Manufacturer MSC Technologies GmbH Board Name Informative Shows the board name Board Revision Informative Shows the board revision Bios Version Informative Shows the bios version Serial Number Informative Shows the boards serial number Boot Counter... -
Page 46: Firmware Update
MSC C10M-BT / MSC C10M-BTC User Manual Feature Options Description VCore Informative Shows the VCore voltage Infomative Shows the 5V voltage 5V Standby Informative Shows the current 5V Standby voltage Shows the voltage of the CMOS Vbat Informative backup battery. Note: A value of 2.5V or below would indicate that the CMOS battery is nearly empty or it could also indicate that no... -
Page 47: Trusted Computing ( Tpm 1.2 )
MSC C10M-BT / MSC C10M-BTC User Manual Feature Options Description PPM Configuration Submenu CPU PPM Configuration settings IDE Configuration Submenu AHCI SATA Configuration settings Internal Devices Submenu Internal Devices Configuration settings Configuration Network Stack Submenu Configuration for UEFI Network boot Configuration AMI Graphic Output Submenu... -
Page 48: Trusted Computing ( Tpm 2.0 )
MSC C10M-BT / MSC C10M-BTC User Manual 6.7.2 Trusted Computing ( TPM 2.0 ) Feature Options Description Pending operation None, TPM Clear Schedule an Operation for the Security Device. NOTE: Your Computer will reboot during restart in order to change State of Security Device. Platform Hierarchy Enabled Enable or Disable Platform Hierarchy... -
Page 49: Console Redirection Submenu
MSC C10M-BT / MSC C10M-BTC User Manual Feature Options Description Console Redirection Submenu The settings specify how the host computer and the settings Com 0 remote computer (which the user is using) will exchange data. Both computers should have the same or compatible settings. -
Page 50: Cpu Configuration
MSC C10M-BT / MSC C10M-BTC User Manual Feature Options Description Stop Bits Stop bits indicate the end of a serial data packet. (A start bit indicates the beginning). The standard setting is 1 stop bit. Communication with slow devices may require more than 1 stop bit. -
Page 51: Ppm Configuration
MSC C10M-BT / MSC C10M-BTC User Manual Feature Options Description Hardware Prefetcher Enabled To turn on/off the Mid Level Cache Disabled (L2) streamer prefetcher. Adjacent Cache Line Enabled To turn on/off prefetching of adjacent Prefetch Disabled cache lines. Power Technology Energy Efficient Enable the power management Disabled... -
Page 52: Ide Configuration
MSC C10M-BT / MSC C10M-BTC User Manual Feature Options Description Max CPU C-state This option controls Max C state that the processor will support 6.7.8 IDE Configuration Feature Options Description Serial-ATA (SATA) Enabled Enable / Disable SATA Disabled SATA Test Mode Enabled Test Mode enable / disable. -
Page 53: Ami Graphic Output Policy
MSC C10M-BT / MSC C10M-BTC User Manual Feature Options Description SCC eMMC 4.5 DDR50 Enabled SCC eMMC 4.5 DDR50 Support Support Disabled Enable/Disable SCC eMMC 4.5 HS200 Enabled SCC eMMC 4.5 HS200 Support Support Disabled Enable/Disable SD Card / GPIO Support SD Card, GPIO Enable SD Card Support or EAPI GPIO support... -
Page 54: Csm Configuration
MSC C10M-BT / MSC C10M-BTC User Manual Feature Options Description IPv6 PXE Support Enabled, Disabled Enable Ipv6 PXE Boot Support. If disabled IPV6 PXE boot option will not be created PXE boot wait time 1-5s Wait time to press ESC key to abort the PXE boot Media detect count 1-50... -
Page 55: Nvme
MSC C10M-BT / MSC C10M-BTC User Manual Feature Options Description Launch Video OPROM Do not launch, Controls the execution of UEFI and Legacy Video UEFI only, OPROM. Legacy only Legacy first UEFI first Other PCI device ROM UEFI Oprom For PCI devices other than Network, Mass storage Legacy Oprom or Video defines which Oprom to launch 6.7.13... -
Page 56: Security Configuration
MSC C10M-BT / MSC C10M-BTC User Manual Feature Options Description ownership change should be claimed by XHCI driver. EHCI Hand-off Enabled, Disabled This is a workaround for OSes without EHCI hand-off support. The EHCI ownership change should be claimed by EHCI driver. - Page 57 MSC C10M-BT / MSC C10M-BTC User Manual Feature Options Description TXE EOP Message Enabled Send EOP message before enter OS Disabled TXE Unconfiguration None Revert TXE settings to factory defaults Perform 57 / 90...
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Page 58: Sio Wb627 Configuration
MSC C10M-BT / MSC C10M-BTC User Manual 6.7.17 SIO WB627 Configuration Feature Options Description COM A: Enabled, Enable or disable COM A on Winbond SIO Disabled COM A Setting: Auto, Resource setting for COM A on Winbond SIO I/O 3F8h, IRQ 4 I/O 3F8h, IRQ 3, 4, 5, 6, 7,10, 11, I/O 2F8h, IRQ 3,... -
Page 59: Ec Hardware Monitoring
MSC C10M-BT / MSC C10M-BTC User Manual Feature Options Description LPT Mode: SPP, EPP 1.9, Mode setting for LPT on Winbond SIO ECP, ECP + EPP 1.9, Printer Mode, EPP 1.7, ECP+EPP 1.7 WB627 PS/2 Controller Disabled, Enable or disable the WB627 PS/2 controller. Enabled Note: The above super IO menus will only appear if the SuperIO device is discovered on the carrier board. - Page 60 MSC C10M-BT / MSC C10M-BTC User Manual CPU / System / Memory 40° to 80° in 5° steps Temperature threshold (in degrees celsius) Temperature Sensor at which the fan should be set to medium configuration speed duty cycle. Temperature Limit T2 Note: This option depends on selected [°C] temperature source ( CPU/System/Board or...
- Page 61 MSC C10M-BT / MSC C10M-BTC User Manual PWM min Fan running with minimum speed (typically 25%) PWM mid Fan running with medium speed (typically 50%) PWM max Fan running with maximum speed (typically 100%) Temperature zone T<T1, Fan stopped Temperature zone T1<T<T2, Fan running with minimum speed Temperature zone T2<T<T3, Fan running with medium speed Temperature zone T2<T<T3, Fan running with maximum speed Minimum temperature limit starting Fan (selectable by SETUP)
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Page 62: Legacy Irq Reservation
MSC C10M-BT / MSC C10M-BTC User Manual 6.7.19 Legacy IRQ Reservation Feature Options Description Reserve IRQ 1,3,4,5,6,7,10,1 Reserve IRQ 1,12 Reserve IRQ 1,3,4,5,6,7,10,1 Reserve IRQ 1,12 Reserve IRQ 1,3,4,5,6,7,10,1 Reserve IRQ 1,12 Reserve IRQ 1,3,4,5,6,7,10,1 Reserve IRQ 1,12 6.7.20 Module-specific Initialization Feature Options Description... -
Page 63: I210 Gigabit Connection Settings
MSC C10M-BT / MSC C10M-BTC User Manual Feature Options Description POST Watchdog Enabled, Enable a watchdog during bios POST ( before OS Disabled boot). ATTENTION: if this watchdog is configured with timeouts that are too agressive, the board might not be able to boot anymore! Note: Values are valid not until before second boot. -
Page 64: Flat Panel Configuration
MSC C10M-BT / MSC C10M-BTC User Manual 6.8.1 Flat Panel Configuration Feature Options Description Flat Panel Type LVDS, no LVDS Select flatpanel type eDP Color Depth 18bit, 24bit eDP color depth selection. Adjust this according to the connected eDP display. When using LVDS, keep this setting consistent with the selected LVDS Mapping color depth. -
Page 65: North Bridge
MSC C10M-BT / MSC C10M-BTC User Manual Feature Options Description PWM Control EC, Chipset EC means PWM will be controlled by the board controller. Chipset means PWM will be controlled by videobios. PWM Polarity Active Low, Backlight PWM signal polarity Active High PWM Brightness 0-100%... - Page 66 MSC C10M-BT / MSC C10M-BTC User Manual Feature Options Description IGD Turbo Mode Enabled Enable: IGD Turbo enabled Disabled Disable: IGD Turbo disabled Primary Display Select which of IGD/PCI Graphics device should be Auto Primary Display PCIe PAVC Disabled Enable/Disable Protected Audio Video Control Lite Mode Serpent Mode DVMT Pre-Allocated...
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Page 67: South Bridge
MSC C10M-BT / MSC C10M-BTC User Manual 6.8.4 South Bridge Feature Options Description Azalia HD Audio Submenu Azalia HD Audio Configuration settings. USB Configuration Submenu USB Configuration settings PCI Express Submenu PCI Express Configuration settings Configuration Restore AC Power Loss Power Off Select AC power state when power is re-applied Power On... - Page 68 MSC C10M-BT / MSC C10M-BTC User Manual Feature Options Description HDMI Port B Enabled, Enable/Disable HDMI Port B Disabled USB Configuration 6.8.4.2 Feature Options Description USB Device Support Enabled, Enable or Disable the USB Device Controller. This Disabled Controller handles both USB2 and USB3 device ports.
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Page 69: Security
MSC C10M-BT / MSC C10M-BTC User Manual Feature Options Description ASPM ( Port 0-3 ) Enabled, PCI Express Active State Power Management Disabled settings. Hot Plug ( 0-3 ) Enabled, Enable or disable PCI Express Hot Plug. Disabled Security Feature Options Description Administrator Password... -
Page 70: Key Management
MSC C10M-BT / MSC C10M-BTC User Manual 6.9.2 Key Management Feature Options Description Provision Factory Enabled, Allow to provision factory default Secure Boot keys Defaults Disabled when System is in Setup Mode “Enter” Reset to Setup Mode Force System to Setup Mode - clear all Secure Boot Variables “Enter”... - Page 71 MSC C10M-BT / MSC C10M-BTC User Manual Boot 6.9.2.1 Feature Options Description Setup Prompt Timeout 1-65535sec Number of seconds to wait for setup activation key. 65535(0xFFFF) means wait forever. Bootup NumLock State On, Off Select the keyboard NumLock state Quiet Boot Enabled, Enables/Disables Quiet Boot option Disabled...
- Page 72 MSC C10M-BT / MSC C10M-BTC User Manual Feature Options Description Boot Priority 4 SATA Port 0/1, Define which boot device should have the fourth USB Port 0-5, highest boot priority SD Card, LAN, UEFI LAN, External Devices Allow other devices Yes, No If set to no, only devices defined in the advanced boot device selection items are allowed to boot...
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Page 73: The Save & Exit Menu
MSC C10M-BT / MSC C10M-BTC User Manual 6.9.3 The Save & Exit Menu The following sections describe each of the options on this menu. Save Changes and Exit After making changes in the setup menus, always select "Exit Saving Changes". This procedure stores the selections displayed in the menus in a flash. - Page 74 MSC C10M-BT / MSC C10M-BTC User Manual Save as User Defaults Save changes done so far as User defaults. Boot Override It will display all the available boot options from the Boot Option List. The user can select any of the options to select to the particular device and boot directly from it.
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Page 75: Bios And Firmware Update
MSC C10M-BT / MSC C10M-BTC User Manual Bios and Firmware Update This update procedure is for newer BIOS versions, V1.50 or later. For older BIOS versions please see the relevant readme file or contact Technical Support. Setup Controlled Update Within BIOS Setup main menu there is a submenu “MSC Firmware Update”... -
Page 76: Bios Update From Efi Shell
MSC C10M-BT / MSC C10M-BTC User Manual Bios Update from EFI Shell BIOS Update - Batch Mode 1. Copy the contents of the .zip file onto an empty FAT32 formatted USB stick 2. Copy selected flash image file to \Recovery\FlashImg.bin 3. -
Page 77: Bios Recovery
MSC C10M-BT / MSC C10M-BTC User Manual Bios Recovery If a Bios update will be interrupted (e.g due to power loss) before the update has finished, it can happen that the system will not boot. In this case it is possible to restore the Bios with the following method: 1. -
Page 78: Clear Cmos And Recovery Jumper
For more information see chapter 7.6. These jumpers are located on the top side of the board. Post Codes For Post Code information please look on the MSC Technologies Support Website or contact Avnet Integrated / MSC Technical Support: Email: support@msc-technologies.eu... -
Page 79: Technotes
MSC C10M-BT / MSC C10M-BTC User Manual Technotes ® EIST (Enhanced Intel Speed Step) This allows the processor to meet the instantaneous performance needs of the operation being performed, while minimizing power draw and heat dissipation. Processor clock will be at its minimum possible frequency when in IDLE. - Page 80 MSC C10M-BT / MSC C10M-BTC User Manual ® Intel VT and VT-d Increasing manageability, security, and flexibility in IT environments, ® virtualization technologies like hardware-assisted Intel Virtualization ® Technology (Intel VT) combined with software-based virtualization solutions provide maximum system utilization by consolidating multiple environments into a single server or PC.
- Page 81 MSC C10M-BT / MSC C10M-BTC User Manual "Sealing" encrypts data in similar manner to binding, but in addition specifies a state in which the TPM must be in order for the data to be decrypted (unsealed). Software can use a Trusted Platform Module to authenticate hardware devices.
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Page 82: Eapi
MSC C10M-BT / MSC C10M-BTC User Manual EAPI The "Embedded Application Programming Interface" (EAPI) used by this module provides a standardized interface for customer applications. This interface allows a user mode application access to hardware specific information as well as hardware resources. Following features are supported: ... -
Page 83: Bios Configurator Tool
MSC C10M-BT / MSC C10M-BTC User Manual BIOS Configurator Tool This tool is a Windows based tool and is available from MSC. It allows customers to configure the preferred default values in their BIOS, splash screen, custom LVDS display timing and other features. For more details please refer to the MSC Technologies Support Website or contact MSC Technical support. -
Page 84: Troubleshooting
MSC C10M-BT / MSC C10M-BTC User Manual Troubleshooting Issue 1: USB 3.0 stick causes hang at boot time Some USB 3.0 sticks/disks may cause BIOS hang at post code 0xB4, if XHCI mapping mode is not set to enabled. Solution: Please check for firmware update of the USB device. - Page 85 MSC C10M-BT / MSC C10M-BTC User Manual Issue 7 : LPSS / SCC Devices If your LPSS / SCC Device does not work correctly, please check the “LPSS & SCC Device Mode” configuration (see chapter 7.8.7 Internal Device Configuration). For additional help please contact MSC Technical Support: Phone: +49 - 8165 906 - 200 Email:...
- Page 86 MSC C10M-BT / MSC C10M-BTC User Manual LICENSE ISSUES OPenSSL ====================== The OpenSSL toolkit stays under a dual license, i.e. both the conditions of the OpenSSL License and the original SSLeay license apply to the toolkit. See below for the actual license texts. Actually both licenses are BSD-style Open Source licenses.
- Page 87 MSC C10M-BT / MSC C10M-BTC User Manual * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE OpenSSL PROJECT OR * ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; * LOSS OF USE, DATA, OR PROFITS;...
- Page 88 MSC C10M-BT / MSC C10M-BTC User Manual must display the following acknowledgement: "This product includes cryptographic software written by Eric Young (eay@cryptsoft.com)" The word 'cryptographic' can be left out if the rouines from the library being used are not cryptographic related :-). * 4.
- Page 89 MSC C10M-BT / MSC C10M-BTC User Manual 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. 3. Neither the name(s) of the above-listed copyright holder(s) nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.
- Page 90 MSC C10M-BT / MSC C10M-BTC User Manual The original security mechanism of IEEE 802.11 standard was not designed to be strong and has proven to be insufficient for most networks that require some kind of security. Task group I (Security) of IEEE 802.11 working group (http://www.ieee802.org/11/) has worked to address the flaws of the base standard and has in practice completed its work in May 2004.
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