A.1.2 Cpu Module; Cpu Module; Front Panel - Cabletron Systems SmartCell 6A000 User Manual

Hardware Components
Reset Button
Console Terminal
Figure A-1 Front panel
A.1.2

CPU Module

The CPU module provides control, signaling, and LAN server functions for the switch. A 32-bit RISC processor
(i960CF, 33 MHz) operates all switch software options.
An on-board Segmentation and Reassembly (SAR) ASIC provides rapid packet processing. A common DRAM bank
stores both CPU data structures and SAR processing buffers. Sixteen megabytes of DRAM is standard; 64 MB is
optional.
512 KB SRAM supports up to 4096 VCs routed through the CPU module.
Appendix A-2 SmartCell 6A000 User Guide
Ejector
S
Y
S
T
E
M
A C
E
T
H
C
E
O
R
M
N
E
(RJ-45)
T
B D
Ejector
FAIL
STATUS
POWER
FAIL
STATUS
RX DATA
POWER
RX ENET
TX DATA
TX ENET
Ethernet Port
(10Base-T)
Features and Specifications
DATA
NO SYNC