Supermicro C9X299-PGF-L User Manual page 88

Super C9X299-PGF-L/-RPGF-L User's Manual
CPU Socket 0 Configuration
CPU Socket 0 Configuration
Available Bitmap: The available Bitmap will displayed
Core Disable Bitmap(Hex)
Enter 0 to enable all CPU cores. Enter FFFFFFFFFFF to disable all CPU cores.
Please note that at least one core per CPU must be enabled. Disabling all cores is
not allowed. The default option is 0.
Hyper-Threading [ALL]
This feature enables hyper-threading. The options are Disabled and Enabled.
Max CPUID Value Limit
This feature enables legacy operating systems which cannot support CPUs with extended
CPUID to boot. The options are Disabled and Enabled.
Execute Disable Bit
This feature enables Execute Disable Bit. When disabled, it forces the Execute Disable
feature flag to always return 0. The options are Disabled and Enabled.
Intel(VMX) Virtualization Technology
This feature enables a VMM to utilize Vanderpool (virtualization) Technology hardware
capabilities. The options are Disabled and Enabled.
PPIN Control
This feature unlocks and either enables or disables PPIN Control. The options are Unlock/
Disable or Unlock/Enable.
Hardware Prefetcher
This feature controls the MLC streamer prefetcher. The options are Disabled and Enabled.
Adjacent Cache Prefetch
This feature enables Adjacent Cache Prefetch. The options are Disabled and Enabled.
DCU Streamer Prefetcher
This feature enables DCU Streamer Prefetcher, which is an L1 data cache prefetcher. The
options are Disabled and Enabled.
DCU IP Prefetcher
This feature enables DCU IP Prefetcher, which is an L1 data cache prefetcher. The options
are Disabled and Enabled.
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