Table of Contents
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33
BANK112_TX0_P
35
GND
37
BANK112_TX1_N
39
BANK112_TX1_P
41
GND
43
BANK112_TX2_N
45
BANK112_TX2_P
47
GND
49
BANK112_TX3_N
51
BANK112_TX3_P
53
GND
55
BANK112_CLK0_N
57
BANK112_CLK0_P
59
GND
61
63
65
GND
67
69
71
GND
73
75
77
GND
79
81
83
GND
85
87
89
GND
91
93
95
GND
28 / 33
ZYNQ FPGA Development Board AC7Z035 User Manual
AA2
R13
W1
W2
R13
U1
U2
R13
R1
R2
R13
R5
R6
-
-
-
-
-
-
-
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34
BANK112_RX0_P
36
GND
38
BANK112_RX1_N
40
BANK112_RX1_P
42
GND
44
BANK112_RX2_N
46
BANK112_RX2_P
48
GND
50
BANK112_RX3_N
52
BANK112_RX3_P
54
GND
56
BANK112_CLK1_N
58
BANK112_CLK1_P
60
GND
62
BANK111_RX3_N
64
BANK111_RX3_P
66
GND
68
BANK111_TX3_N
70
BANK111_TX3_P
72
GND
74
BANK111_RX2_N
76
BANK111_RX2_P
78
GND
80
BANK111_TX2_N
82
BANK111_TX2_P
84
GND
86
BANK111_RX1_N
88
BANK111_RX1_P
90
GND
92
BANK111_TX1_N
94
BANK111_TX1_P
96
GND
AB4
R13
Y3
Y4
R13
V3
V4
R13
T3
T4
R13
U5
U6
R13
AD3
AD4
R13
AC1
AC2
R13
AC5
AC6
R13
AE1
AE2
R13
AE5
AE6
R13
AF3
AF4
R13
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