Table of Contents
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PL_DDR3_DQS1_N
PL_DDR3_DQS2_P
PL_DDR3_DQS2_N
PL_DDR3_DQS3_P
PL_DDR3_DQS4_N
PL_DDR3_D0
PL_DDR3_D1
PL_DDR3_D2
PL_DDR3_D3
PL_DDR3_D4
PL_DDR3_D5
PL_DDR3_D6
PL_DDR3_D7
PL_DDR3_D8
PL_DDR3_D9
PL_DDR3_D10
PL_DDR3_D11
PL_DDR3_D12
PL_DDR3_D13
PL_DDR3_D14
PL_DDR3_D15
PL_DDR3_D16
PL_DDR3_D17
PL_DDR3_D18
PL_DDR3_D19
PL_DDR3_D20
PL_DDR3_D21
PL_DDR3_D22
PL_DDR3_D23
PL_DDR3_D24
PL_DDR3_D25
PL_DDR3_D26
PL_DDR3_D27
PL_DDR3_D28
PL_DDR3_D29
PL_DDR3_D30
13 / 33
ZYNQ FPGA Development Board AC7Z035 User Manual
IO_L9N_T1_DQS_33
IO_L15P_T2_DQS_33
IO_L15N_T2_DQS_33
IO_L21P_T3_DQS_33
IO_L21N_T3_DQS_33
IO_L5N_T0_33
IO_L1N_T0_33
IO_L4P_T0_33
IO_L1P_T0_33
IO_L2N_T0_33
IO_L5P_T0_33
IO_L2P_T0_33
IO_L4N_T0_33
IO_L7N_T1_33
IO_L10N_T1_33
IO_L7P_T1_33
IO_L8N_T1_33
IO_L11N_T1_SRCC_33
IO_L8P_T1_33
IO_L11P_T1_SRCC_33
IO_L10P_T1_33
IO_L18P_T2_33
IO_L14P_T2_SRCC_33
IO_L14N_T2_SRCC_33
IO_L13P_T2_MRCC_33
IO_L16P_T2_33
IO_L17P_T2_33
IO_L16N_T2_33
IO_L17N_T2_33
IO_L23P_T3_33
IO_L22N_T3_33
IO_L19P_T3_33
IO_L20N_T3_33
IO_L24P_T3_33
IO_L20P_T3_33
IO_L24N_T3_33
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K1
N3
N2
M8
L8
E1
F4
D1
G4
D3
E2
D4
C1
H1
G1
J1
H3
K3
H4
L3
H2
N1
L5
L4
M6
M2
N4
L2
M4
N7
J6
M7
J5
K8
K5
K7
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