Alinx ZYNQ AC7Z035 User Manual page 12

PS_DDR3_DM2
PS_DDR3_DM3
PS_DDR3_A0
PS_DDR3_A1
PS_DDR3_A2
PS_DDR3_A3
PS_DDR3_A4
PS_DDR3_A5
PS_DDR3_A6
PS_DDR3_A7
PS_DDR3_A8
PS_DDR3_A9
PS_DDR3_A10
PS_DDR3_A11
PS_DDR3_A12
PS_DDR3_A13
PS_DDR3_A14
PS_DDR3_BA0
PS_DDR3_BA1
PS_DDR3_BA2
PS_DDR3_S0
PS_DDR3_RAS
PS_DDR3_CAS
PS_DDR3_WE
PS_DDR3_ODT
PS_DDR3_RESET
PS_DDR3_CLK0_P
PS_DDR3_CLK0_N
PS_DDR3_CKE
PL side DDR3 DRAM pin assignment:
Signal Name
PL_DDR3_DQS0_P
PL_DDR3_DQS0_N
PL_DDR3_DQS1_P
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ZYNQ FPGA Development Board AC7Z035 User Manual
PS_DDR_DM2_502
PS_DDR_DM3_502
PS_DDR_A0_502
PS_DDR_A1_502
PS_DDR_A2_502
PS_DDR_A3_502
PS_DDR_A4_502
PS_DDR_A5_502
PS_DDR_A6_502
PS_DDR_A7_502
PS_DDR_A8_502
PS_DDR_A9_502
PS_DDR_A10_502
PS_DDR_A11_502
PS_DDR_A12_502
PS_DDR_A13_502
PS_DDR_A14_502
PS_DDR_BA0_502
PS_DDR_BA1_502
PS_DDR_BA2_502
PS_DDR_CS_B_502
PS_DDR_RAS_B_502
PS_DDR_CAS_B_502
PS_DDR_WE_B_502
PS_DDR_ODT_502
PS_DDR_DRST_B_502
PS_DDR_CKP_502
PS_DDR_CKN_502
PS_DDR_CKE_502
ZYNQ Pin Name
IO_L3P_T0_DQS_33
IO_L3N_T0_DQS_33
IO_L9P_T1_DQS_33
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P26
V26
K22
K20
N21
L22
M20
N22
L20
J21
T20
U20
M22
H21
P20
J20
R20
U22
T22
R22
Y21
V23
Y23
V22
Y22
H22
R21
P21
U21
ZYNQ Pin Number
G2
F2
K2