Configuration Pins - Quectel 5G Series Hardware Design

65 RFFE_VIO_1V8
61 ANTCTL1*
63 ANTCTL2*
NOTE
1)
If this function is required, please contact Quectel for more details.

4.8. Configuration Pins

RM500Q-GL provides four configuration pins, which are defined as below.
Table 28: Configuration Pins List of M.2 Specification
Config_0 Config_1
(Pin 21) (Pin 69)
NC GND
Table 29: Configuration Pins of the Module
Pin No. Pin Name
21 CONFIG_0
69 CONFIG_1
75 CONFIG_2
1 CONFIG_3
RM500Q-GL_Hardware_Design
1)
PO Power supply for RFFE
DO, PD
Antenna Control
DO, PD
Config_2 Config_3
(Pin 75) (Pin 1)
NC NC
I/O
DO
DO
DO
DO
RM500Q-GL Hardware Design
1.8 V
Maximum output current: 50 mA
1.8 V
1.8 V
Module Type and
Main Host Interface
Quectel defined
Description
Not connected internally
Connected to GND internally
Not connected internally
Not connected internally
5G Module Series
Port
Configuration
2
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