General Low-Power Features; Cpu Core And Peripherals In Low-Power Modes - Motorola M-CORE MMC2001 Series Reference Manual

Power may or may not be available to peripherals (except for the TOD and OSC) and
CPU while in standby mode, depending on the level of V
is to enable the SRAM and TOD to remain valid while the state of the other on-chip
components is undefined.
Table 8-2 CPU Core and Peripherals in Low-Power Modes
Module
CPU Core Running
UART Running
ISPI Running
Interrupt Controller Running
EIM Running
PWMs Running
Watchdog Timer Running
Interval Timer (PIT) Running
Time-of-Day Timer
Running
(TOD)
GPIO/Keypad Running
OnCE Running
*Dependent on programming

8.2.3 General Low-Power Features

8.2.3.1 Peripheral Shut Down
Each peripheral may be disabled by software in order to cease internal clock genera-
tion and remain in a static state. Each peripheral has its own specific disabling
sequence (refer to each peripheral description for further details).
8.2.3.2 CLKOUT Pin Shut Down
This output pin may be disabled in the low state to lower power consumption via the
CLKOUT enable (CKOE) bit in the reset/timer block.
MMC2001
REFERENCE MANUAL
Freescale Semiconductor, Inc.
Peripheral Clock Status during Mode/Wake-up Capability
Run Wait
Stopped
Running/Yes
Running/Yes
Stopped/Yes
Stopped/No
Running/Yes
Running/Yes
Running/Yes
Running/Yes
Running/Yes
Running/Yes
CLOCK MODULE AND LOW-POWER MODES
For More Information On This Product,
Go to: www.freescale.com
. The purpose of this mode
DD
Doze Stop
Stopped Stopped
Prog.*/Yes Stopped/No
Prog.*/Yes Stopped/No
Stopped/Yes Stopped/Yes
Stopped/No Stopped/No
Prog.*/Yes Stopped/No
Prog.*/Yes Prog.*/Yes
Prog.*/Yes Prog.*/Yes
Running/Yes Running/Yes
Running/Yes Stopped/Yes
Running/Yes Running/Yes
Standby
Stopped
Stopped/No
Stopped/No
Stopped/No
Stopped/No
Stopped/No
Stopped/No
Stopped/No
Running/No
Stopped/No
Stopped/No
MOTOROLA
8-7