Eim Configuration Register - Motorola M-CORE MMC2001 Series Reference Manual

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EIMCR — EIM Configuration Register
31
30
29
28
R
0
0
0
0
W
RESET:
15
14
13
12
R
0
0
0
W
RESET:
SZEN — Enable SIZ signal to UART CH1 pins
This bit is used to select the function provided by the UART channel 1 pins. On reset,
this bit is cleared.
0 = UART channel 0 operation. Pins function as TxD1, RxD1.
1 = SIZ function operation. Pins function as SIZ0 and SIZ1 outputs independent
of function or direction programmed in UART channel 1 control registers.
PSTEN — Enable PSTAT signals to UART CH0 pins
This bit is used to select the function provided by the UART channel 0 pins. On reset,
this bit is cleared.
0 = UART channel 0 operation. Pins function as TxD0, RxD0, CTS0, and RTS0.
1 = PSTAT function operation. Pins function as PSTAT outputs independent of
function or direction programmed in UART channel 0 control registers.
SPRAM — Internal RAM Supervisor Protect
This bit is used to restrict accesses to the internal RAM space if the access is
attempted in the user mode of CPU operation. On reset, this bit is set.
0 = User mode accesses are allowed to the internal RAM.
1 = User mode accesses are prohibited. An attempted access to the internal
RAM in user mode will result in TEA assertion to the CPU.
SPROM — Internal ROM Supervisor Protect
This bit is used to restrict accesses to the internal ROM space if the access is
attempted in the user mode of CPU operation. On reset, this bit is set.
0 = User mode accesses are allowed to the internal ROM.
1 = User mode accesses are prohibited. An attempted access to the internal
ROM in user mode will result in a TEA to the CPU.
HDB — High Data Bus
This bit is used to determine which byte lanes of the internal data bus are driven onto
the external data bus when show cycles are enabled. This bit is ignored if SHEN is
cleared.
0 = Lower internal data bus bits DATA[15:0] are driven externally.
1 = Upper internal data bus bits DATA[31:16] are driven externally.
MMC2001
REFERENCE MANUAL
Freescale Semiconductor, Inc.
27
26
25
0
0
0
11
10
9
0
0
0
0
Figure C-23 EIM Configuration Register
PROGRAMMING REFERENCE
For More Information On This Product,
Go to: www.freescale.com
24
23
22
21
0
0
0
0
8
7
6
5
0
0
PST
SZEN
EN
RAM
10004018
20
19
18
17
0
0
0
0
4
3
2
1
SP
SP
HDB
SHEN
ROM
1
1
0
0
MOTOROLA
16
0
0
0
C-21

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