Hssp Programming Steps; Hssp Timeout Parameters - Infineon PSoC 4 Quick Start Quide

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PSoC 4 Programming Using an External Microcontroller (HSSP)
HSSP Firmware Architecture
Note:
See the section
modify the HSSP source code.
2.4

HSSP Programming Steps

This layer includes the files named ProgrammingSteps.c and ProgrammingSteps.h. These files contain the top-
level functions of the HSSP application. These functions are described in sequence as follows:
Device Acquire: In this step, the device is acquired by sending a specific sequence through the SWD
1.
interface after a device reset. As a result, the host programmer can control the Cortex-M0 CPU and other
system resources, such as SRAM and registers. The PSoC 40xx, PSoC 4xx7_BLE, PSoC 40xxS PSoC 41xxS and
PSoC 4100PS family of devices requires the internal main oscillator (IMO) frequency to be set at 48 MHz
before flash erase/write operations. This operation is also included in the Device Acquire routine for these
devices.
Note:
Some of the devices in the PSoC 4000 family do not have a dedicated reset (XRES) pin, and have to
be reset by toggling the device power rails. This is referred to as Power Cycle Mode programming.
Refer to the
modifying the code to support power cycle mode programming.
Verify Silicon ID: This step verifies that the acquired device is the same as the one for which the hex file was
2.
generated.
Erase All Flash: This step erases all user rows and corresponding flash protection.
3.
Checksum Privileged Calculation: After all the user rows are erased, this step calculates the checksum of
4.
the privileged rows, which is used to verify the checksum of the user rows in
Program Flash: In this step, flash is programmed using the programming data in the hex file and SROM API
5.
calls.
Verify Flash: This step is used to verify the flash data programmed in the previous step with the data in the
6.
hex file. This step is optional but highly recommended.
Program Protection Settings: In this step, row protection settings and chip protection settings from the
7.
hex file are written to the specific flash area.
Verify Protection Settings: Both protection settings are matched with the settings in the hex file.
8.
Verify Checksum: This step matches the checksum of the user data in the flash with the checksum in the
9.
hex file. It uses the checksum of the privileged rows calculated in step 4.
Exit HSSP Programming Mode: This step releases the target device from programming mode.
10.
Each of these steps is described by functions made up of basic SWD instructions. See the programming
specifications document of the respective device listed in the
information.
The functions declared in the ProgrammingSteps.h file access the functions, definitions, and global variables
from three layers: SWD Protocol Packet layer, DataFetch layer, and Timeout layer. The functions provided in the
ProgrammingSteps.c and ProgrammingSteps.h files cover all the steps required to program the target device.
2.5

HSSP Timeout Parameters

Table 4
Timeout Layer Files
Source File
Timeout (.c and .h
files)
Application Note
Interface for Receiving HSSP Programming Data
Power Cycle Mode Programming
Description
These files contain the timestamp definitions and the delay routines used in HSSP.
section for details on the changes required for
Related Documentation
7 of 45
for information on how to
Step
9.
section for detailed
001-84858 Rev. *N
2021-03-23

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