User Manuals: Infineon PSoC 63 Low Energy MCU

Manuals and User Guides for Infineon PSoC 63 Low Energy MCU. We have 1 Infineon PSoC 63 Low Energy MCU manual available for free PDF download: Reference Manual

Infineon PSoC 63 Reference Manual (652 pages)

CY8C63x6, CY8C63x7 architecture

Brand: Infineon | Category: Microcontrollers | Size: 7 MB

Capacitive Sensing
18
Getting Started
20
Documentation Conventions
21
Section B: CPU Subsystem
29
Top Level Architecture
29
Instruction Set
37
Write Buffer
39
Wait States
40
Inter-Processor Communication
41
Message Passing
45
Full Duplex Communication
46
Fault Monitoring
49
Fault Report
50
Fault Information
51
Signaling Interface
52
Low-Power Mode Operation
53
Register List
55
Interrupts and Exceptions - Operation
59
Level and Pulse Interrupts
60
Exception Vector Table
60
Exception Sources
62
Reset Exception
62
Hardfault Exception
63
Supervisor Call (Svcall) Exception
64
Interrupt Source
65
Enabling and Disabling Interrupts
70
Operation
72
Interrupts and Low-Power Modes
73
Register Architecture
79
Dma Controller
90
Channel Interrupts
92
Address Configuration
95
Transfer Size
97
Trigger Selection
98
Output Triggers
99
Status Registers
99
DMA Performance
99
Memory Interface
103
Instruction Format
107
Error Reporting
108
Register-File
129
Status Register
132
Instruction Format
134
Program and Debug Interface
148
Serial Wire Debug (SWD) Interface
152
SWD Timing Details
153
ACK Details
154
Turnaround (Trn) Period Details
154
Jtag Interface
154
SWD Port Acquisition
157
Register Name
158
Non-Volatile Memory
159
Flash Memory
159
Block Diagram
159
Flash Controller
161
Power Modes
161
Flash Memory Programming
163
System Call Implementation
164
System Calls
166
Write Row
172
Program Row
174
Erase All
176
Soft Reset
183
System Call Status
191
Default Description
195
Code Segment
203
Device Security
212
Flash Security
216
Section C: System Resources Subsystem (SRSS)
217
Top Level Architecture
217
Power Supply and Monitoring
218
Power Sequencing Requirements
223
Backup Domain
224
Power Supply Sources
224
Voltage Monitoring
224
Low-Voltage-Detect (LVD)
225
Overvoltage Protection (OVP)
226
Register List
226
Device Power Modes
227
Other Operation Modes
232
Reset State
232
Off State
232
Power Mode Transitions
233
Register List
240
Backup System
241
Power Supply
242
Alarm Feature
246
Clocking System
249
Clock Sources
250
External Clock (EXTCLK)
251
Clock Generation
253
Phase-Locked Loop (PLL)
253
Timer Clock
261
Peripheral Clock Divider Configuration
263
Reset System
268
Power-On Reset
270
Brownout Reset
270
Watchdog Timer Reset
270
Software Initiated Reset
270
External Reset
270
Identifying Reset Sources
271
Register List
272
I/O Cell Architecture
275
Digital Input Buffer
276
Digital Output Driver
276
Drive Mode
277
Slew Rate Control
279
High-Speed I/O Matrix
279
I/O State on Power up
282
Behavior in Low-Power Modes
283
LCD Drive
286
Clock and Reset
288
Lookup Table (LUT)
290
Operation
297
Watchdog Timer
300
Watchdog Reset
303
Watchdog Interrupt
304
Enabling and Disabling WDT
309
Register List
313
Reference Clocks
323
Section D: Digital Subsystem
327
Top Level Architecture
328
Clocking Modes
331
Serial Peripheral Interface (Spi)
332
General Description
333
SPI Modes of Operation
334
FIFO Mode
339
Clock Modes
345
SPI Master
349
SPI Slave
350
Median Filter
351
SPI Registers
351
Standard Protocol
353
Break Detection
356
LIN Frame Structure
359
Smartcard Mode
365
LIN Mode
366
Irda Mode
367
UART Registers
367
Inter Integrated Circuit (I 2 C)
368
External Electrical Connections
369
Terms and Definitions
370
Clock Stretching
370
Bus Arbitration
371
I 2 C Modes of Operation
371
Read Transfer
372
Enabling and Initializing the I 2 C
381
SPI Interrupts
385
UART Interrupts
388
Command Mode
398
Data Transfer
407
Sleep Operation
411
Trigger Inputs
414
Trigger Outputs
416
PWM Outputs
417
Operation Modes
418
Timer Mode
419
Capture Mode
426
Quadrature Decoder Mode
429
Pulse Width Modulation Mode
433
Trigger Output
434
Pulse Width Modulation with Dead Time Mode
444
TCPWM Registers
450
Interrupt Support
462
Register Setting
467
Operation Mode
467
High Pass Filter
471
Serial Interface Engine (SIE)
474
Operation
475
Power Scheme
476
VBUS Detection
476
Transfer Types
478
Buffer Overflow
480
DMA Support
481
Clock Control Block
496
Interrupt Control Block
496
USB Bus Reset
498
Token Packet
499
Data Packet
504
Handshake Packet
504
Retry Function
504
Error Status
505
Interrupt Sources
506
DMA Transfer Function
507
Suspend Operation
511
Resume Operation
511
Drive Modes
515
Register List
527
Dynamic Configuration
532
Input Description
545
Interrupt Generation
557
Counter Mode
560
Sync Mode
561
Auxiliary Control Register
561
Interrupt Enable
562
Clock Control
564
Reset Control
565
Section E: Analog Subsystem
578
Startup Modes
581
Low-Power Modes
581
Input Configuration
584
Charge Pump
592
Switching Matrix
592
Sample and Hold
594
Comparator Mode
594
Comparator Configuration
594
Comparator Interrupt
595
Output Paths
601
Other Configurations
603
Input Range
612
Acquisition Time
615
Startup Time
623
Channel Configuration
624
Range Detection
625
Double Buffer
625
Temperature Sensor
630
Firmware Reset
641
Power States
642
Multiple Connections
643
Context Switching
644
Data Buffer Management
645
Register Summary
647
Bit Description
649
Revision History
650
Document Version
650

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User Manuals: Infineon PSoC 63 Low Energy MCU

Infineon PSoC 63 Reference Manual (652 pages)

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