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PSoC 4 Programming Using an External Microcontroller (HSSP)
Tips and Tricks for Debugging HSSP Issues
10
Tips and Tricks for Debugging HSSP Issues
Porting the HSSP code from the PSoC 5LP host processor used in the code example to your own processor
architecture might be a complex task depending on the other system level constraints on the host processor
side. This section helps you in troubleshooting the most commonly encountered issues while developing an
HSSP application for your hardware platform.
Hardware Setup Validation: The first step is to ensure that the hardware connections are done properly for
•
the HSSP operation. This includes making the correct pin connections between the host processor and the
target PSoC 4 device, powering of all the PSoC 4 voltage domains, and ensuring the host SWD pins drive
mode settings are configured appropriately. See the "Physical Layer" section of the respective device
programming specification, listed in the section -
hardware connections and configuration.
Timing Validation: When porting the host PSoC 5LP code to your host processor, ensure that the timeout
•
parameters used in the code are modified to reflect the host processor code timing. See the section -
Calculating HSSP Timeout Parameters
porting the code.
The first step of the HSSP "Device Acquire" has strict timing requirements with regards to entering the
programming mode. One of the important requirements is to ensure that the frequency of SWDCK clock line is
at least 1.5 MHz to meet the acquire window timing. Ensure that there are no interrupt events in the host
processor, which can affect the code execution time for completing the "Device Acquire" step on the host
processor side. Ensure that the host processor is able to meet all the timing requirements explained in "Step 1 –
Acquire Chip" of the respective device programming specification document.
HSSP Algorithm Validation:
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While porting the HSSP code, if any changes were made to the SWD packet layer files shown in
−
ensure that the SWD packet format is the same as that mentioned in the section "Serial Wire Debug (SWD)
Format" in the device programming specification.
Infineon qualified programmers like MiniProg3, KitProg can be used to validate and debug the steps like
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"Erase Flash", "Program Flash" in
flash memory, the MiniProg3 programmer and the "Read" option in the PSoC Programmer GUI can be
used to verify that the entire flash data is zero. The "Checksum" option in PSoC Programmer GUI can be
used to ensure that the checksum of the flash data programmed in to the device matches the checksum
of the hex file that is fed as the input file to the GUI. Additionally, the "Patch Image" option in the PSoC
Programmer GUI can be used to identify the number of flash rows for which there is a data mismatch
between the device flash content and the hex file data.
Application Note
Programming Specifications
– for information on modifying the timeout parameters while
Figure
1. For example, to check if the host processor erased the entire
29 of 45
- for details on the
Figure
001-84858 Rev. *N
2021-03-23
1,
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