Quectel QuecOpen AG525R-GL Hardware Design page 66

BT_UART_RTS 61
BT_UART_CTS 62
PCM_SYNC 265
PCM_CLK 262
PCM_IN 263
PCM_OUT 261
Others interfaces
WLAN_PWR_EN2 225
WLAN_PWR_EN1 222
WLAN_EN 228
BT_EN 66
WLAN_SLP_CLK 231
VDD_WIFI_VM 276
VDD_WIFI_VH 277
NOTES
1. When WLAN or BT function is used, the coexistence interface must be used simultaneously.
2. When BT function is enabled on the module, PCM_SYNC and PCM_CLK pins will only be used to
output signals.
3. It is recommended that the networks of PCIE_CLKREQ and PCIE_WAKE are pulled up to VDD_EXT.
4. "*" means under development.
The following figure shows a reference design for WLAN and BT interfaces application.
AG525R-GL_QuecOpen_Hardware_Design
DI BT UART request to send
DO BT UART clear to send
IO PCM data frame sync
IO PCM data bit clock
DI PCM data input
DO PCM data output
WLAN power supply enable
DO
control 2
WLAN power supply enable
DO
control 1
DO WLAN enable
DO BT function enable
DO WLAN sleep clock
PO Power supply for Wi-Fi
PO Power supply for Wi-FI
Automotive Module Series
AG525R-GL QuecOpen Hardware Design
1.8 V power domain.
Can be configured to
GPIOs.
1.8 V power domain.
Vnorm = 1.35 V
Vnorm = 1.95 V
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