Quectel QuecOpen AG525R-GL Hardware Design page 33

SDC1_DATA_0 49
SDC1_DATA_1 50
SDC1_DATA_2 51
SDC1_DATA_3 52
SDC1_CMD 48
SDC1_DATA_4 53
SDC1_DATA_5 55
SDC1_DATA_6 56
SDC1_DATA_7 58
SDC1_CLK 47
EMMC_RST 54
EMMC_PWR_
45
EN
SPI Interfaces
Pin Name Pin No.
SPI1_CLK 216
SPI1_CS 213
SPI1_MISO 219
SPI1_MOSI 210
SPI2_CLK 103
AG525R-GL_QuecOpen_Hardware_Design
IO SDIO data bit 0
IO SDIO data bit 1
IO SDIO data bit 2
IO SDIO data bit 3
IO SDIO command
IO SDIO data bit 4
IO SDIO data bit 5
IO SDIO data bit 6
IO SDIO data bit 7
DO SDIO clock
DO eMMC reset
eMMC power
DO supply enable
control
I/O Description
DO SPI1 clock
DO SPI1 chip select
SPI1 master-in
DI
salve-out
SPI1 master-out
DO
slave-in
DO SPI2 clock
Automotive Module Series
AG525R-GL QuecOpen Hardware Design
V max = 0.45 V
OL
V min = 1.4 V
OH
V min = -0.3 V
IL
V max = 0.58 V
IL
V min = 1.27 V
IH
V max = 2.0 V
IH
V max = 0.45 V
OL
V min = 1.35 V
OH
V min = -0.3 V
IL
V max = 0.63 V
IL
V min = 1.17 V
IH
V max = 2.1 V
IH
V max = 0.45 V
OL
V min = 1.4 V
OH
V max = 0.45 V
OL
V min = 1.35 V
OH
V max = 0.45 V
OL
V min = 1.35 V
OH
DC
Characteristics
V max = 0.45 V
OL
V min = 1.35 V
OH
V max = 0.45 V
OL
V min = 1.35 V
OH
V min = -0.3 V
IL
V max = 0.63 V
IL
V min = 1.17 V
IH
V max = 2.1 V
IH
V max = 0.45 V
OL
V min = 1.35 V
OH
V max = 0.45 V
OL
V min = 1.35 V
OH
1.8 V power domain
for eMMC
applications.
If unused, keep it
open.
1.8 V power domain
Can be configured
to GPIOs.
If unused, keep
them open.
1.8 V power domain
for eMMC
applications.
If unused, keep it
open.
1.8 V power domain.
If unused, keep it
open.
1.8 V power domain.
If unused, keep it
open.
Comment
1.8 V power domain.
If unused, keep
them open.
Can be configured
into GPIOs.
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