Overview - Texas Instruments ADC32RF-EVM Series User Manual

Overview

5 ADC32RFxx-EVM GUI JESD204B Tab Bypass Mode
6 HSDC Pro Device Selection LMFS_82820 Mode
7 Example Capture from Channel A – Bypass Mode
8 ADC32RFxx-EVM GUI LMK04828 PLL1 Page DDC Mode
9 ADC32RFxx-EVM Quick Setup View DDC Mode
10 ADC32RFxx-EVM GUI JESD204B Configuration Tab DDC Mode
11 ADC32RFxx-EVM GUI DDC Configuration Tab
12 Connecting to TSW14J56
13 HSDC Pro Device Selection LMFS8821 Mode
14 Download Firmware
15 Resetting the TSW14J56
16 Popup Window for Setting HSDC Pro Decimation Factor and NCO Frequency
17 Example Capture From Channel A – 8x Decimation Mode
18 ADC32RFxx-EVM GUI LMK04828 PLL1 Page DDC Mode
19 ADC32RFxx-EVM Quick Setup View DDC Mode
20 ADC32RFxx-EVM GUI JESD204B Configuration Tab DDC Mode
21 ADC32RFxx-EVM GUI DDC Configuration Tab
22 Connecting to TSW14J56
23 HSDC Pro Device Selection LMFS8821 Mode
24 Download Firmware
25 Resetting the TSW14J56
26 Popup Window for Setting HSDC Pro Decimation Factor and NCO Frequency
27 Example Capture From Channel A – 8x Decimation Mode
28 ADC32RF44-EVM Quick Setup View Bypass Mode
29 HSDC Pro Device Selection LMFS_8224 Mode
30 Example Capture from Channel A – LMFS8224 Mode
31 ADC32RF42-EVM Quick Setup View Bypass Mode
32 HSDC Pro Device Selection LMFS_42810 Mode
33 Example Capture from Channel A – LMFS42810 Mode
34 ADC32RFxx EVM GUI With LMX Clock Configuration
35 ADC32RFxx EVM GUI With LMK Clock Configuration
Trademarks
Microsoft, Windows are registered trademarks of Microsoft Corporation.
LabVIEW is a trademark of National Instruments.
1 Overview
The ADC32RFxx-EVM is an evaluation module (EVM) designed to evaluate the ADC32RFxx family of
high-speed, JESD204B interface ADCs. The EVM includes an onboard clocking solution (LMK04828),
transformer-coupled analog inputs, full power solution, and easy-to-use software GUI and USB interface.
The following features apply to this EVM:
• Transformer-coupled signal input network allowing a single-ended signal source from 30 MHz to 3000
MHz.
• LMK04828 system clock generator that generates field-programmable gate array (FPGA) reference
clocks for the high-speed serial interface and may optionally be used to generate the ADC sampling
clock.
• Transformer-coupled clock input network to test the ADC performance with a very low-noise clock
source.
• LMX2582 (or LMX2592) clock synthesizer to generate a very low-noise clock source for clocking the
ADC32RFxx ADC.
• High-speed serial data output over a standard FPGA Mezzanine Card (FMC) interface connector.
2
ADC32RFxx-EVM
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Copyright © 2016–2017, Texas Instruments Incorporated
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SLAU620D – April 2016 – Revised August 2017
www.ti.com
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