Texas Instruments CC3235 SimpleLink Series Technical Reference Manual page 433

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Table 12-17. RINTCTL Register Field Descriptions (continued)
Bit Field
0 ROVRN
SWRU543 – January 2019
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Type Reset Description
R/W 0h
Receiver overrun interrupt enable bit.
0h = Interrupt is disabled. A receiver overrun interrupt does not
generate a McASP receive interrupt (RINT).
1h = Interrupt is enabled. A receiver overrun interrupt generates a
McASP receive interrupt (RINT).
Inter-Integrated Sound (I2S) Multichannel Audio Serial Port
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I2S Registers
433